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authorGravatar bunnei2015-02-22 12:48:28 -0500
committerGravatar bunnei2015-02-22 12:48:28 -0500
commitdfe807b2cd824caeb495382e2aff307ae75a5fc9 (patch)
tree08eaa6f752ad36cdc9ec43b1473424d68edbd05a /src
parentMerge pull request #594 from Subv/display_transfer (diff)
parentCleaned up unaligned access. (diff)
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Merge pull request #596 from kevinhartman/unaligned-cleanup
Clean up unaligned 32-bit memory reads
Diffstat (limited to 'src')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp19
-rw-r--r--src/core/mem_map_funcs.cpp18
2 files changed, 2 insertions, 35 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index b691ffbc3..3b508f617 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -4422,12 +4422,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
4422 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4422 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
4423 4423
4424 unsigned int value = Memory::Read32(addr); 4424 unsigned int value = Memory::Read32(addr);
4425 if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) 4425 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4426 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4427 else {
4428 value = ROTATE_RIGHT_32(value,(8*(addr&0x3)));
4429 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4430 }
4431 4426
4432 if (BITS(inst_cream->inst, 12, 15) == 15) { 4427 if (BITS(inst_cream->inst, 12, 15) == 15) {
4433 // For armv5t, should enter thumb when bits[0] is non-zero. 4428 // For armv5t, should enter thumb when bits[0] is non-zero.
@@ -4450,12 +4445,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
4450 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1); 4445 inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
4451 4446
4452 unsigned int value = Memory::Read32(addr); 4447 unsigned int value = Memory::Read32(addr);
4453 if (BIT(CP15_REG(CP15_CONTROL), 22) == 1) 4448 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4454 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4455 else {
4456 value = ROTATE_RIGHT_32(value,(8*(addr&0x3)));
4457 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4458 }
4459 4449
4460 if (BITS(inst_cream->inst, 12, 15) == 15) { 4450 if (BITS(inst_cream->inst, 12, 15) == 15) {
4461 // For armv5t, should enter thumb when bits[0] is non-zero. 4451 // For armv5t, should enter thumb when bits[0] is non-zero.
@@ -4699,11 +4689,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
4699 unsigned int value = Memory::Read32(addr); 4689 unsigned int value = Memory::Read32(addr);
4700 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value; 4690 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4701 4691
4702 if (BIT(CP15_REG(CP15_CONTROL), 22) == 1)
4703 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
4704 else
4705 cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ROTATE_RIGHT_32(value,(8*(addr&0x3))) ;
4706
4707 if (BITS(inst_cream->inst, 12, 15) == 15) { 4692 if (BITS(inst_cream->inst, 12, 15) == 15) {
4708 INC_PC(sizeof(ldst_inst)); 4693 INC_PC(sizeof(ldst_inst));
4709 goto DISPATCH; 4694 goto DISPATCH;
diff --git a/src/core/mem_map_funcs.cpp b/src/core/mem_map_funcs.cpp
index 4f93c0e64..48f61db4e 100644
--- a/src/core/mem_map_funcs.cpp
+++ b/src/core/mem_map_funcs.cpp
@@ -236,30 +236,12 @@ u8 Read8(const VAddr addr) {
236u16 Read16(const VAddr addr) { 236u16 Read16(const VAddr addr) {
237 u16_le data = 0; 237 u16_le data = 0;
238 Read<u16_le>(data, addr); 238 Read<u16_le>(data, addr);
239
240 // Check for 16-bit unaligned memory reads...
241 if (addr & 1) {
242 // TODO(bunnei): Implement 16-bit unaligned memory reads
243 LOG_ERROR(HW_Memory, "16-bit unaligned memory reads are not implemented!");
244 }
245
246 return (u16)data; 239 return (u16)data;
247} 240}
248 241
249u32 Read32(const VAddr addr) { 242u32 Read32(const VAddr addr) {
250 u32_le data = 0; 243 u32_le data = 0;
251 Read<u32_le>(data, addr); 244 Read<u32_le>(data, addr);
252
253 // Check for 32-bit unaligned memory reads...
254 if (addr & 3) {
255 // ARM allows for unaligned memory reads, however older ARM architectures read out memory
256 // from unaligned addresses in a shifted way. Our ARM CPU core (SkyEye) corrects for this,
257 // so therefore expects the memory to be read out in this manner.
258 // TODO(bunnei): Determine if this is necessary - perhaps it is OK to remove this from both
259 // SkyEye and here?
260 int shift = (addr & 3) * 8;
261 data = (data << shift) | (data >> (32 - shift));
262 }
263 return (u32)data; 245 return (u32)data;
264} 246}
265 247