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| author |  Lioncash | 2015-01-07 16:38:52 -0500 |
|---|---|---|
| committer | Lioncash | 2015-01-07 16:41:08 -0500 |
| commit | df5e0f9f288d1ddb5e0563caf5071df6028fa57d (patch) | |
| tree | 3123d9ced84b294884e7c9d3b6e7ebfc09476b46 /src | |
| parent | Merge pull request #438 from lioncash/swp (diff) | |
| download | yuzu-df5e0f9f288d1ddb5e0563caf5071df6028fa57d.tar.gz yuzu-df5e0f9f288d1ddb5e0563caf5071df6028fa57d.tar.xz yuzu-df5e0f9f288d1ddb5e0563caf5071df6028fa57d.zip | |
dyncom: Fix SMULWB/SMULWT
Wasn't doing proper sign-extension
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 426fc6474..7c710ccde 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |||
| @@ -5891,16 +5891,13 @@ unsigned InterpreterMainLoop(ARMul_State* state) { | |||
| 5891 | 5891 | ||
| 5892 | SMULW_INST: | 5892 | SMULW_INST: |
| 5893 | { | 5893 | { |
| 5894 | if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) { | 5894 | if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) { |
| 5895 | smlad_inst *inst_cream = (smlad_inst *)inst_base->component; | 5895 | smlad_inst* const inst_cream = (smlad_inst*)inst_base->component; |
| 5896 | int64_t rm = RM; | 5896 | |
| 5897 | int64_t rn = RN; | 5897 | s16 rm = (inst_cream->m == 1) ? ((RM >> 16) & 0xFFFF) : (RM & 0xFFFF); |
| 5898 | if (inst_cream->m) | 5898 | |
| 5899 | rm = BITS(rm, 16, 31); | 5899 | s64 result = (s64)rm * (s64)(s32)RN; |
| 5900 | else | 5900 | RD = BITS(result, 16, 47); |
| 5901 | rm = BITS(rm, 0, 15); | ||
| 5902 | int64_t rst = rm * rn; | ||
| 5903 | RD = BITS(rst, 16, 47); | ||
| 5904 | } | 5901 | } |
| 5905 | cpu->Reg[15] += GET_INST_SIZE(cpu); | 5902 | cpu->Reg[15] += GET_INST_SIZE(cpu); |
| 5906 | INC_PC(sizeof(smlad_inst)); | 5903 | INC_PC(sizeof(smlad_inst)); |