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authorGravatar Subv2018-06-12 11:24:10 -0500
committerGravatar Subv2018-06-12 11:46:45 -0500
commitdb0497b808c8f092d55f3331e35eb37b83e496c8 (patch)
tree13133ab3fc15a4aa2734ca6f21649cabf37c1b98 /src
parentMerge pull request #555 from Subv/gpu_sysregs (diff)
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GPU: Implemented the iadd32i shader instruction.
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/shader_bytecode.h12
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp21
2 files changed, 31 insertions, 2 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index ec8dbd370..5ec69596b 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -217,7 +217,7 @@ union Instruction {
217 217
218 union { 218 union {
219 BitField<20, 19, u64> imm20_19; 219 BitField<20, 19, u64> imm20_19;
220 BitField<20, 32, u64> imm20_32; 220 BitField<20, 32, s64> imm20_32;
221 BitField<45, 1, u64> negate_b; 221 BitField<45, 1, u64> negate_b;
222 BitField<46, 1, u64> abs_a; 222 BitField<46, 1, u64> abs_a;
223 BitField<48, 1, u64> negate_a; 223 BitField<48, 1, u64> negate_a;
@@ -247,7 +247,7 @@ union Instruction {
247 247
248 float GetImm20_32() const { 248 float GetImm20_32() const {
249 float result{}; 249 float result{};
250 u32 imm{static_cast<u32>(imm20_32)}; 250 s32 imm{static_cast<s32>(imm20_32)};
251 std::memcpy(&result, &imm, sizeof(imm)); 251 std::memcpy(&result, &imm, sizeof(imm));
252 return result; 252 return result;
253 } 253 }
@@ -271,6 +271,11 @@ union Instruction {
271 } alu_integer; 271 } alu_integer;
272 272
273 union { 273 union {
274 BitField<54, 1, u64> saturate;
275 BitField<56, 1, u64> negate_a;
276 } iadd32i;
277
278 union {
274 BitField<20, 8, u64> shift_position; 279 BitField<20, 8, u64> shift_position;
275 BitField<28, 8, u64> shift_length; 280 BitField<28, 8, u64> shift_length;
276 BitField<48, 1, u64> negate_b; 281 BitField<48, 1, u64> negate_b;
@@ -451,6 +456,7 @@ public:
451 IADD_C, 456 IADD_C,
452 IADD_R, 457 IADD_R,
453 IADD_IMM, 458 IADD_IMM,
459 IADD32I,
454 ISCADD_C, // Scale and Add 460 ISCADD_C, // Scale and Add
455 ISCADD_R, 461 ISCADD_R,
456 ISCADD_IMM, 462 ISCADD_IMM,
@@ -510,6 +516,7 @@ public:
510 Trivial, 516 Trivial,
511 Arithmetic, 517 Arithmetic,
512 ArithmeticInteger, 518 ArithmeticInteger,
519 ArithmeticIntegerImmediate,
513 Bfe, 520 Bfe,
514 Logic, 521 Logic,
515 Shift, 522 Shift,
@@ -642,6 +649,7 @@ private:
642 INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"), 649 INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"),
643 INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"), 650 INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"),
644 INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"), 651 INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"),
652 INST("0001110---------", Id::IADD32I, Type::ArithmeticIntegerImmediate, "IADD32I"),
645 INST("0100110000011---", Id::ISCADD_C, Type::ArithmeticInteger, "ISCADD_C"), 653 INST("0100110000011---", Id::ISCADD_C, Type::ArithmeticInteger, "ISCADD_C"),
646 INST("0101110000011---", Id::ISCADD_R, Type::ArithmeticInteger, "ISCADD_R"), 654 INST("0101110000011---", Id::ISCADD_R, Type::ArithmeticInteger, "ISCADD_R"),
647 INST("0011100-00011---", Id::ISCADD_IMM, Type::ArithmeticInteger, "ISCADD_IMM"), 655 INST("0011100-00011---", Id::ISCADD_IMM, Type::ArithmeticInteger, "ISCADD_IMM"),
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index 67726e7c6..920e52691 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -1005,6 +1005,27 @@ private:
1005 break; 1005 break;
1006 } 1006 }
1007 1007
1008 case OpCode::Type::ArithmeticIntegerImmediate: {
1009 std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
1010
1011 if (instr.iadd32i.negate_a)
1012 op_a = '-' + op_a;
1013
1014 std::string op_b = '(' + std::to_string(instr.alu.imm20_32.Value()) + ')';
1015
1016 switch (opcode->GetId()) {
1017 case OpCode::Id::IADD32I:
1018 regs.SetRegisterToInteger(instr.gpr0, true, 0, op_a + " + " + op_b, 1, 1,
1019 instr.iadd32i.saturate != 0);
1020 break;
1021 default: {
1022 NGLOG_CRITICAL(HW_GPU, "Unhandled ArithmeticIntegerImmediate instruction: {}",
1023 opcode->GetName());
1024 UNREACHABLE();
1025 }
1026 }
1027 break;
1028 }
1008 case OpCode::Type::ArithmeticInteger: { 1029 case OpCode::Type::ArithmeticInteger: {
1009 std::string op_a = regs.GetRegisterAsInteger(instr.gpr8); 1030 std::string op_a = regs.GetRegisterAsInteger(instr.gpr8);
1010 1031