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| author | 2018-11-21 04:36:44 -0300 | |
|---|---|---|
| committer | 2018-11-21 04:56:00 -0300 | |
| commit | d92afc74937610dc3a50d7f2659362351a02da14 (patch) | |
| tree | 508cd739bfc3864cbd3eea4e15288f09ee826e32 /src | |
| parent | Merge pull request #1751 from bunnei/color-mask-fix (diff) | |
| download | yuzu-d92afc74937610dc3a50d7f2659362351a02da14.tar.gz yuzu-d92afc74937610dc3a50d7f2659362351a02da14.tar.xz yuzu-d92afc74937610dc3a50d7f2659362351a02da14.zip | |
gl_shader_decompiler: Implement R2P_IMM
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 14 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 28 |
2 files changed, 42 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 83a6fd875..5b84bcb24 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h | |||
| @@ -365,6 +365,11 @@ enum class HalfPrecision : u64 { | |||
| 365 | FMZ = 2, | 365 | FMZ = 2, |
| 366 | }; | 366 | }; |
| 367 | 367 | ||
| 368 | enum class R2pMode : u64 { | ||
| 369 | Pr = 0, | ||
| 370 | Cc = 1, | ||
| 371 | }; | ||
| 372 | |||
| 368 | enum class IpaInterpMode : u64 { | 373 | enum class IpaInterpMode : u64 { |
| 369 | Linear = 0, | 374 | Linear = 0, |
| 370 | Perspective = 1, | 375 | Perspective = 1, |
| @@ -855,6 +860,12 @@ union Instruction { | |||
| 855 | } hsetp2; | 860 | } hsetp2; |
| 856 | 861 | ||
| 857 | union { | 862 | union { |
| 863 | BitField<40, 1, R2pMode> mode; | ||
| 864 | BitField<41, 2, u64> byte; | ||
| 865 | BitField<20, 7, u64> immediate_mask; | ||
| 866 | } r2p; | ||
| 867 | |||
| 868 | union { | ||
| 858 | BitField<39, 3, u64> pred39; | 869 | BitField<39, 3, u64> pred39; |
| 859 | BitField<42, 1, u64> neg_pred; | 870 | BitField<42, 1, u64> neg_pred; |
| 860 | BitField<43, 1, u64> neg_a; | 871 | BitField<43, 1, u64> neg_a; |
| @@ -1381,6 +1392,7 @@ public: | |||
| 1381 | PSETP, | 1392 | PSETP, |
| 1382 | PSET, | 1393 | PSET, |
| 1383 | CSETP, | 1394 | CSETP, |
| 1395 | R2P_IMM, | ||
| 1384 | XMAD_IMM, | 1396 | XMAD_IMM, |
| 1385 | XMAD_CR, | 1397 | XMAD_CR, |
| 1386 | XMAD_RC, | 1398 | XMAD_RC, |
| @@ -1410,6 +1422,7 @@ public: | |||
| 1410 | HalfSetPredicate, | 1422 | HalfSetPredicate, |
| 1411 | PredicateSetPredicate, | 1423 | PredicateSetPredicate, |
| 1412 | PredicateSetRegister, | 1424 | PredicateSetRegister, |
| 1425 | RegisterSetPredicate, | ||
| 1413 | Conversion, | 1426 | Conversion, |
| 1414 | Xmad, | 1427 | Xmad, |
| 1415 | Unknown, | 1428 | Unknown, |
| @@ -1647,6 +1660,7 @@ private: | |||
| 1647 | INST("0101000010001---", Id::PSET, Type::PredicateSetRegister, "PSET"), | 1660 | INST("0101000010001---", Id::PSET, Type::PredicateSetRegister, "PSET"), |
| 1648 | INST("0101000010010---", Id::PSETP, Type::PredicateSetPredicate, "PSETP"), | 1661 | INST("0101000010010---", Id::PSETP, Type::PredicateSetPredicate, "PSETP"), |
| 1649 | INST("010100001010----", Id::CSETP, Type::PredicateSetPredicate, "CSETP"), | 1662 | INST("010100001010----", Id::CSETP, Type::PredicateSetPredicate, "CSETP"), |
| 1663 | INST("0011100-11110---", Id::R2P_IMM, Type::RegisterSetPredicate, "R2P_IMM"), | ||
| 1650 | INST("0011011-00------", Id::XMAD_IMM, Type::Xmad, "XMAD_IMM"), | 1664 | INST("0011011-00------", Id::XMAD_IMM, Type::Xmad, "XMAD_IMM"), |
| 1651 | INST("0100111---------", Id::XMAD_CR, Type::Xmad, "XMAD_CR"), | 1665 | INST("0100111---------", Id::XMAD_CR, Type::Xmad, "XMAD_CR"), |
| 1652 | INST("010100010-------", Id::XMAD_RC, Type::Xmad, "XMAD_RC"), | 1666 | INST("010100010-------", Id::XMAD_RC, Type::Xmad, "XMAD_RC"), |
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 5fde22ad4..30050b585 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |||
| @@ -3260,6 +3260,34 @@ private: | |||
| 3260 | } | 3260 | } |
| 3261 | break; | 3261 | break; |
| 3262 | } | 3262 | } |
| 3263 | case OpCode::Type::RegisterSetPredicate: { | ||
| 3264 | UNIMPLEMENTED_IF(instr.r2p.mode != Tegra::Shader::R2pMode::Pr); | ||
| 3265 | |||
| 3266 | const std::string apply_mask = [&]() { | ||
| 3267 | switch (opcode->get().GetId()) { | ||
| 3268 | case OpCode::Id::R2P_IMM: | ||
| 3269 | return std::to_string(instr.r2p.immediate_mask); | ||
| 3270 | default: | ||
| 3271 | UNREACHABLE(); | ||
| 3272 | } | ||
| 3273 | }(); | ||
| 3274 | const std::string mask = '(' + regs.GetRegisterAsInteger(instr.gpr8, 0, false) + | ||
| 3275 | " >> " + std::to_string(instr.r2p.byte) + ')'; | ||
| 3276 | |||
| 3277 | constexpr u64 programmable_preds = 7; | ||
| 3278 | for (u64 pred = 0; pred < programmable_preds; ++pred) { | ||
| 3279 | const auto shift = std::to_string(1 << pred); | ||
| 3280 | |||
| 3281 | shader.AddLine("if ((" + apply_mask + " & " + shift + ") != 0) {"); | ||
| 3282 | ++shader.scope; | ||
| 3283 | |||
| 3284 | SetPredicate(pred, '(' + mask + " & " + shift + ") != 0"); | ||
| 3285 | |||
| 3286 | --shader.scope; | ||
| 3287 | shader.AddLine('}'); | ||
| 3288 | } | ||
| 3289 | break; | ||
| 3290 | } | ||
| 3263 | case OpCode::Type::FloatSet: { | 3291 | case OpCode::Type::FloatSet: { |
| 3264 | const std::string op_a = GetOperandAbsNeg(regs.GetRegisterAsFloat(instr.gpr8), | 3292 | const std::string op_a = GetOperandAbsNeg(regs.GetRegisterAsFloat(instr.gpr8), |
| 3265 | instr.fset.abs_a != 0, instr.fset.neg_a != 0); | 3293 | instr.fset.abs_a != 0, instr.fset.neg_a != 0); |