diff options
| author | 2019-05-07 17:30:36 -0400 | |
|---|---|---|
| committer | 2019-06-20 21:36:12 -0300 | |
| commit | d86f9cd70910d4b96ec301e7d532b11d18a290a4 (patch) | |
| tree | b284db029f1532f5135a243b027b53cc27f30b94 /src | |
| parent | Corrections to Structural Matching (diff) | |
| download | yuzu-d86f9cd70910d4b96ec301e7d532b11d18a290a4.tar.gz yuzu-d86f9cd70910d4b96ec301e7d532b11d18a290a4.tar.xz yuzu-d86f9cd70910d4b96ec301e7d532b11d18a290a4.zip | |
Change texture_cache chaching from GPUAddr to CacheAddr
This also reverses the changes to make invalidation and flushing through
the GPU address.
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/memory_manager.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/rasterizer_interface.h | 4 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 16 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.h | 2 | ||||
| -rw-r--r-- | src/video_core/texture_cache/surface_base.cpp | 5 | ||||
| -rw-r--r-- | src/video_core/texture_cache/surface_base.h | 30 | ||||
| -rw-r--r-- | src/video_core/texture_cache/texture_cache.h | 102 |
7 files changed, 60 insertions, 101 deletions
diff --git a/src/video_core/memory_manager.cpp b/src/video_core/memory_manager.cpp index 74a1441e3..5d8d126c1 100644 --- a/src/video_core/memory_manager.cpp +++ b/src/video_core/memory_manager.cpp | |||
| @@ -69,7 +69,7 @@ GPUVAddr MemoryManager::UnmapBuffer(GPUVAddr gpu_addr, u64 size) { | |||
| 69 | const u64 aligned_size{Common::AlignUp(size, page_size)}; | 69 | const u64 aligned_size{Common::AlignUp(size, page_size)}; |
| 70 | const CacheAddr cache_addr{ToCacheAddr(GetPointer(gpu_addr))}; | 70 | const CacheAddr cache_addr{ToCacheAddr(GetPointer(gpu_addr))}; |
| 71 | 71 | ||
| 72 | rasterizer.FlushAndInvalidateRegionEx(gpu_addr, cache_addr, aligned_size); | 72 | rasterizer.FlushAndInvalidateRegion(cache_addr, aligned_size); |
| 73 | UnmapRange(gpu_addr, aligned_size); | 73 | UnmapRange(gpu_addr, aligned_size); |
| 74 | 74 | ||
| 75 | return gpu_addr; | 75 | return gpu_addr; |
diff --git a/src/video_core/rasterizer_interface.h b/src/video_core/rasterizer_interface.h index d5505ef9c..3c18d3b1f 100644 --- a/src/video_core/rasterizer_interface.h +++ b/src/video_core/rasterizer_interface.h | |||
| @@ -49,10 +49,6 @@ public: | |||
| 49 | /// and invalidated | 49 | /// and invalidated |
| 50 | virtual void FlushAndInvalidateRegion(CacheAddr addr, u64 size) = 0; | 50 | virtual void FlushAndInvalidateRegion(CacheAddr addr, u64 size) = 0; |
| 51 | 51 | ||
| 52 | /// Notify rasterizer that any caches of the specified region should be flushed to Switch memory | ||
| 53 | /// and invalidated | ||
| 54 | virtual void FlushAndInvalidateRegionEx(GPUVAddr gpu_addr, CacheAddr addr, u64 size) = 0; | ||
| 55 | |||
| 56 | /// Attempt to use a faster method to perform a surface copy | 52 | /// Attempt to use a faster method to perform a surface copy |
| 57 | virtual bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src, | 53 | virtual bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src, |
| 58 | const Tegra::Engines::Fermi2D::Regs::Surface& dst, | 54 | const Tegra::Engines::Fermi2D::Regs::Surface& dst, |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index 482d0428c..77ac963b4 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp | |||
| @@ -737,27 +737,11 @@ void RasterizerOpenGL::InvalidateRegion(CacheAddr addr, u64 size) { | |||
| 737 | buffer_cache.InvalidateRegion(addr, size); | 737 | buffer_cache.InvalidateRegion(addr, size); |
| 738 | } | 738 | } |
| 739 | 739 | ||
| 740 | void RasterizerOpenGL::InvalidateRegionEx(GPUVAddr gpu_addr, CacheAddr addr, u64 size) { | ||
| 741 | MICROPROFILE_SCOPE(OpenGL_CacheManagement); | ||
| 742 | if (!addr || !size) { | ||
| 743 | return; | ||
| 744 | } | ||
| 745 | texture_cache.InvalidateRegionEx(gpu_addr, size); | ||
| 746 | shader_cache.InvalidateRegion(addr, size); | ||
| 747 | global_cache.InvalidateRegion(addr, size); | ||
| 748 | buffer_cache.InvalidateRegion(addr, size); | ||
| 749 | } | ||
| 750 | |||
| 751 | void RasterizerOpenGL::FlushAndInvalidateRegion(CacheAddr addr, u64 size) { | 740 | void RasterizerOpenGL::FlushAndInvalidateRegion(CacheAddr addr, u64 size) { |
| 752 | FlushRegion(addr, size); | 741 | FlushRegion(addr, size); |
| 753 | InvalidateRegion(addr, size); | 742 | InvalidateRegion(addr, size); |
| 754 | } | 743 | } |
| 755 | 744 | ||
| 756 | void RasterizerOpenGL::FlushAndInvalidateRegionEx(GPUVAddr gpu_addr, CacheAddr addr, u64 size) { | ||
| 757 | FlushRegion(addr, size); | ||
| 758 | InvalidateRegionEx(gpu_addr, addr, size); | ||
| 759 | } | ||
| 760 | |||
| 761 | bool RasterizerOpenGL::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src, | 745 | bool RasterizerOpenGL::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src, |
| 762 | const Tegra::Engines::Fermi2D::Regs::Surface& dst, | 746 | const Tegra::Engines::Fermi2D::Regs::Surface& dst, |
| 763 | const Common::Rectangle<u32>& src_rect, | 747 | const Common::Rectangle<u32>& src_rect, |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.h b/src/video_core/renderer_opengl/gl_rasterizer.h index 971a38ab7..5c37d3bfa 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.h +++ b/src/video_core/renderer_opengl/gl_rasterizer.h | |||
| @@ -64,9 +64,7 @@ public: | |||
| 64 | void FlushAll() override; | 64 | void FlushAll() override; |
| 65 | void FlushRegion(CacheAddr addr, u64 size) override; | 65 | void FlushRegion(CacheAddr addr, u64 size) override; |
| 66 | void InvalidateRegion(CacheAddr addr, u64 size) override; | 66 | void InvalidateRegion(CacheAddr addr, u64 size) override; |
| 67 | void InvalidateRegionEx(GPUVAddr gpu_addr, CacheAddr addr, u64 size); | ||
| 68 | void FlushAndInvalidateRegion(CacheAddr addr, u64 size) override; | 67 | void FlushAndInvalidateRegion(CacheAddr addr, u64 size) override; |
| 69 | void FlushAndInvalidateRegionEx(GPUVAddr gpu_addr, CacheAddr addr, u64 size) override; | ||
| 70 | bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src, | 68 | bool AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src, |
| 71 | const Tegra::Engines::Fermi2D::Regs::Surface& dst, | 69 | const Tegra::Engines::Fermi2D::Regs::Surface& dst, |
| 72 | const Common::Rectangle<u32>& src_rect, | 70 | const Common::Rectangle<u32>& src_rect, |
diff --git a/src/video_core/texture_cache/surface_base.cpp b/src/video_core/texture_cache/surface_base.cpp index 5273fcb44..0de0bc656 100644 --- a/src/video_core/texture_cache/surface_base.cpp +++ b/src/video_core/texture_cache/surface_base.cpp | |||
| @@ -25,7 +25,6 @@ SurfaceBaseImpl::SurfaceBaseImpl(const GPUVAddr gpu_vaddr, const SurfaceParams& | |||
| 25 | u32 offset = 0; | 25 | u32 offset = 0; |
| 26 | mipmap_offsets.resize(params.num_levels); | 26 | mipmap_offsets.resize(params.num_levels); |
| 27 | mipmap_sizes.resize(params.num_levels); | 27 | mipmap_sizes.resize(params.num_levels); |
| 28 | gpu_addr_end = gpu_addr + memory_size; | ||
| 29 | for (u32 i = 0; i < params.num_levels; i++) { | 28 | for (u32 i = 0; i < params.num_levels; i++) { |
| 30 | mipmap_offsets[i] = offset; | 29 | mipmap_offsets[i] = offset; |
| 31 | mipmap_sizes[i] = params.GetGuestMipmapSize(i); | 30 | mipmap_sizes[i] = params.GetGuestMipmapSize(i); |
| @@ -99,8 +98,10 @@ void SurfaceBaseImpl::LoadBuffer(Tegra::MemoryManager& memory_manager, | |||
| 99 | } | 98 | } |
| 100 | } | 99 | } |
| 101 | 100 | ||
| 102 | void SurfaceBaseImpl::FlushBuffer(std::vector<u8>& staging_buffer) { | 101 | void SurfaceBaseImpl::FlushBuffer(Tegra::MemoryManager& memory_manager, |
| 102 | std::vector<u8>& staging_buffer) { | ||
| 103 | MICROPROFILE_SCOPE(GPU_Flush_Texture); | 103 | MICROPROFILE_SCOPE(GPU_Flush_Texture); |
| 104 | auto host_ptr = memory_manager.GetPointer(gpu_addr); | ||
| 104 | if (params.is_tiled) { | 105 | if (params.is_tiled) { |
| 105 | ASSERT_MSG(params.block_width == 1, "Block width is defined as {}", params.block_width); | 106 | ASSERT_MSG(params.block_width == 1, "Block width is defined as {}", params.block_width); |
| 106 | for (u32 level = 0; level < params.num_levels; ++level) { | 107 | for (u32 level = 0; level < params.num_levels; ++level) { |
diff --git a/src/video_core/texture_cache/surface_base.h b/src/video_core/texture_cache/surface_base.h index 9c048eb88..74be3237d 100644 --- a/src/video_core/texture_cache/surface_base.h +++ b/src/video_core/texture_cache/surface_base.h | |||
| @@ -45,40 +45,40 @@ class SurfaceBaseImpl { | |||
| 45 | public: | 45 | public: |
| 46 | void LoadBuffer(Tegra::MemoryManager& memory_manager, std::vector<u8>& staging_buffer); | 46 | void LoadBuffer(Tegra::MemoryManager& memory_manager, std::vector<u8>& staging_buffer); |
| 47 | 47 | ||
| 48 | void FlushBuffer(std::vector<u8>& staging_buffer); | 48 | void FlushBuffer(Tegra::MemoryManager& memory_manager, std::vector<u8>& staging_buffer); |
| 49 | 49 | ||
| 50 | GPUVAddr GetGpuAddr() const { | 50 | GPUVAddr GetGpuAddr() const { |
| 51 | return gpu_addr; | 51 | return gpu_addr; |
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | GPUVAddr GetGpuAddrEnd() const { | 54 | bool Overlaps(const CacheAddr start, const CacheAddr end) const { |
| 55 | return gpu_addr_end; | 55 | return (cache_addr < end) && (cache_addr_end > start); |
| 56 | } | ||
| 57 | |||
| 58 | bool Overlaps(const GPUVAddr start, const GPUVAddr end) const { | ||
| 59 | return (gpu_addr < end) && (gpu_addr_end > start); | ||
| 60 | } | 56 | } |
| 61 | 57 | ||
| 62 | // Use only when recycling a surface | 58 | // Use only when recycling a surface |
| 63 | void SetGpuAddr(const GPUVAddr new_addr) { | 59 | void SetGpuAddr(const GPUVAddr new_addr) { |
| 64 | gpu_addr = new_addr; | 60 | gpu_addr = new_addr; |
| 65 | gpu_addr_end = new_addr + memory_size; | ||
| 66 | } | 61 | } |
| 67 | 62 | ||
| 68 | VAddr GetCpuAddr() const { | 63 | VAddr GetCpuAddr() const { |
| 69 | return gpu_addr; | 64 | return cpu_addr; |
| 70 | } | 65 | } |
| 71 | 66 | ||
| 72 | void SetCpuAddr(const VAddr new_addr) { | 67 | void SetCpuAddr(const VAddr new_addr) { |
| 73 | cpu_addr = new_addr; | 68 | cpu_addr = new_addr; |
| 74 | } | 69 | } |
| 75 | 70 | ||
| 76 | u8* GetHostPtr() const { | 71 | CacheAddr GetCacheAddr() const { |
| 77 | return host_ptr; | 72 | return cache_addr; |
| 73 | } | ||
| 74 | |||
| 75 | CacheAddr GetCacheAddrEnd() const { | ||
| 76 | return cache_addr_end; | ||
| 78 | } | 77 | } |
| 79 | 78 | ||
| 80 | void SetHostPtr(u8* new_addr) { | 79 | void SetCacheAddr(const CacheAddr new_addr) { |
| 81 | host_ptr = new_addr; | 80 | cache_addr = new_addr; |
| 81 | cache_addr_end = new_addr + memory_size; | ||
| 82 | } | 82 | } |
| 83 | 83 | ||
| 84 | const SurfaceParams& GetSurfaceParams() const { | 84 | const SurfaceParams& GetSurfaceParams() const { |
| @@ -201,13 +201,13 @@ protected: | |||
| 201 | 201 | ||
| 202 | const SurfaceParams params; | 202 | const SurfaceParams params; |
| 203 | GPUVAddr gpu_addr{}; | 203 | GPUVAddr gpu_addr{}; |
| 204 | GPUVAddr gpu_addr_end{}; | ||
| 205 | std::vector<u32> mipmap_sizes; | 204 | std::vector<u32> mipmap_sizes; |
| 206 | std::vector<u32> mipmap_offsets; | 205 | std::vector<u32> mipmap_offsets; |
| 207 | const std::size_t layer_size; | 206 | const std::size_t layer_size; |
| 208 | const std::size_t memory_size; | 207 | const std::size_t memory_size; |
| 209 | const std::size_t host_memory_size; | 208 | const std::size_t host_memory_size; |
| 210 | u8* host_ptr; | 209 | CacheAddr cache_addr; |
| 210 | CacheAddr cache_addr_end{}; | ||
| 211 | VAddr cpu_addr; | 211 | VAddr cpu_addr; |
| 212 | 212 | ||
| 213 | private: | 213 | private: |
diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h index f3b28453a..43aaec011 100644 --- a/src/video_core/texture_cache/texture_cache.h +++ b/src/video_core/texture_cache/texture_cache.h | |||
| @@ -60,12 +60,6 @@ public: | |||
| 60 | } | 60 | } |
| 61 | } | 61 | } |
| 62 | 62 | ||
| 63 | void InvalidateRegionEx(GPUVAddr addr, std::size_t size) { | ||
| 64 | for (const auto& surface : GetSurfacesInRegionInner(addr, size)) { | ||
| 65 | Unregister(surface); | ||
| 66 | } | ||
| 67 | } | ||
| 68 | |||
| 69 | TView GetTextureSurface(const Tegra::Texture::FullTextureInfo& config, | 63 | TView GetTextureSurface(const Tegra::Texture::FullTextureInfo& config, |
| 70 | const VideoCommon::Shader::Sampler& entry) { | 64 | const VideoCommon::Shader::Sampler& entry) { |
| 71 | const auto gpu_addr{config.tic.Address()}; | 65 | const auto gpu_addr{config.tic.Address()}; |
| @@ -154,9 +148,19 @@ public: | |||
| 154 | return GetSurface(gpu_addr, params, true).second; | 148 | return GetSurface(gpu_addr, params, true).second; |
| 155 | } | 149 | } |
| 156 | 150 | ||
| 157 | TSurface TryFindFramebufferSurface(const u8* host_ptr) const { | 151 | TSurface TryFindFramebufferSurface(const u8* host_ptr) { |
| 158 | const auto it{registered_surfaces.find(ToCacheAddr(host_ptr))}; | 152 | const CacheAddr cache_addr = ToCacheAddr(host_ptr); |
| 159 | return it != registered_surfaces.end() ? *it->second.begin() : nullptr; | 153 | if (!cache_addr) { |
| 154 | return nullptr; | ||
| 155 | } | ||
| 156 | const CacheAddr page = cache_addr >> registry_page_bits; | ||
| 157 | std::list<TSurface>& list = registry[page]; | ||
| 158 | for (auto& s : list) { | ||
| 159 | if (s->GetCacheAddr() == cache_addr) { | ||
| 160 | return s; | ||
| 161 | } | ||
| 162 | } | ||
| 163 | return nullptr; | ||
| 160 | } | 164 | } |
| 161 | 165 | ||
| 162 | u64 Tick() { | 166 | u64 Tick() { |
| @@ -181,30 +185,28 @@ protected: | |||
| 181 | 185 | ||
| 182 | void Register(TSurface surface) { | 186 | void Register(TSurface surface) { |
| 183 | const GPUVAddr gpu_addr = surface->GetGpuAddr(); | 187 | const GPUVAddr gpu_addr = surface->GetGpuAddr(); |
| 184 | u8* host_ptr = memory_manager->GetPointer(gpu_addr); | 188 | const CacheAddr cache_ptr = ToCacheAddr(memory_manager->GetPointer(gpu_addr)); |
| 185 | const std::size_t size = surface->GetSizeInBytes(); | 189 | const std::size_t size = surface->GetSizeInBytes(); |
| 186 | const std::optional<VAddr> cpu_addr = memory_manager->GpuToCpuAddress(gpu_addr); | 190 | const std::optional<VAddr> cpu_addr = memory_manager->GpuToCpuAddress(gpu_addr); |
| 187 | if (!host_ptr || !cpu_addr) { | 191 | if (!cache_ptr || !cpu_addr) { |
| 188 | LOG_CRITICAL(HW_GPU, "Failed to register surface with unmapped gpu_address 0x{:016x}", | 192 | LOG_CRITICAL(HW_GPU, "Failed to register surface with unmapped gpu_address 0x{:016x}", |
| 189 | gpu_addr); | 193 | gpu_addr); |
| 190 | return; | 194 | return; |
| 191 | } | 195 | } |
| 192 | surface->SetHostPtr(host_ptr); | 196 | surface->SetCacheAddr(cache_ptr); |
| 193 | surface->SetCpuAddr(*cpu_addr); | 197 | surface->SetCpuAddr(*cpu_addr); |
| 194 | registered_surfaces.add({GetInterval(host_ptr, size), {surface}}); | ||
| 195 | rasterizer.UpdatePagesCachedCount(*cpu_addr, size, 1); | ||
| 196 | RegisterInnerCache(surface); | 198 | RegisterInnerCache(surface); |
| 197 | surface->MarkAsRegistered(true); | 199 | surface->MarkAsRegistered(true); |
| 200 | rasterizer.UpdatePagesCachedCount(*cpu_addr, size, 1); | ||
| 198 | } | 201 | } |
| 199 | 202 | ||
| 200 | void Unregister(TSurface surface) { | 203 | void Unregister(TSurface surface) { |
| 201 | if (surface->IsProtected()) | 204 | if (surface->IsProtected()) |
| 202 | return; | 205 | return; |
| 203 | const GPUVAddr gpu_addr = surface->GetGpuAddr(); | 206 | const GPUVAddr gpu_addr = surface->GetGpuAddr(); |
| 204 | const void* host_ptr = surface->GetHostPtr(); | 207 | const CacheAddr cache_ptr = surface->GetCacheAddr(); |
| 205 | const std::size_t size = surface->GetSizeInBytes(); | 208 | const std::size_t size = surface->GetSizeInBytes(); |
| 206 | const VAddr cpu_addr = surface->GetCpuAddr(); | 209 | const VAddr cpu_addr = surface->GetCpuAddr(); |
| 207 | registered_surfaces.erase(GetInterval(host_ptr, size)); | ||
| 208 | rasterizer.UpdatePagesCachedCount(cpu_addr, size, -1); | 210 | rasterizer.UpdatePagesCachedCount(cpu_addr, size, -1); |
| 209 | UnregisterInnerCache(surface); | 211 | UnregisterInnerCache(surface); |
| 210 | surface->MarkAsRegistered(false); | 212 | surface->MarkAsRegistered(false); |
| @@ -280,7 +282,7 @@ private: | |||
| 280 | } | 282 | } |
| 281 | } | 283 | } |
| 282 | 284 | ||
| 283 | std::pair<TSurface, TView> RebuildMirage(TSurface current_surface, | 285 | std::pair<TSurface, TView> RebuildSurface(TSurface current_surface, |
| 284 | const SurfaceParams& params) { | 286 | const SurfaceParams& params) { |
| 285 | const auto gpu_addr = current_surface->GetGpuAddr(); | 287 | const auto gpu_addr = current_surface->GetGpuAddr(); |
| 286 | TSurface new_surface = GetUncachedSurface(gpu_addr, params); | 288 | TSurface new_surface = GetUncachedSurface(gpu_addr, params); |
| @@ -297,7 +299,7 @@ private: | |||
| 297 | const SurfaceParams& params) { | 299 | const SurfaceParams& params) { |
| 298 | const bool is_mirage = !current_surface->MatchFormat(params.pixel_format); | 300 | const bool is_mirage = !current_surface->MatchFormat(params.pixel_format); |
| 299 | if (is_mirage) { | 301 | if (is_mirage) { |
| 300 | return RebuildMirage(current_surface, params); | 302 | return RebuildSurface(current_surface, params); |
| 301 | } | 303 | } |
| 302 | const bool matches_target = current_surface->MatchTarget(params.target); | 304 | const bool matches_target = current_surface->MatchTarget(params.target); |
| 303 | if (matches_target) { | 305 | if (matches_target) { |
| @@ -356,7 +358,7 @@ private: | |||
| 356 | const auto host_ptr{memory_manager->GetPointer(gpu_addr)}; | 358 | const auto host_ptr{memory_manager->GetPointer(gpu_addr)}; |
| 357 | const auto cache_addr{ToCacheAddr(host_ptr)}; | 359 | const auto cache_addr{ToCacheAddr(host_ptr)}; |
| 358 | const std::size_t candidate_size = params.GetGuestSizeInBytes(); | 360 | const std::size_t candidate_size = params.GetGuestSizeInBytes(); |
| 359 | auto overlaps{GetSurfacesInRegionInner(gpu_addr, candidate_size)}; | 361 | auto overlaps{GetSurfacesInRegion(cache_addr, candidate_size)}; |
| 360 | if (overlaps.empty()) { | 362 | if (overlaps.empty()) { |
| 361 | return InitializeSurface(gpu_addr, params, preserve_contents); | 363 | return InitializeSurface(gpu_addr, params, preserve_contents); |
| 362 | } | 364 | } |
| @@ -378,7 +380,7 @@ private: | |||
| 378 | if (s_result == MatchStructureResult::FullMatch) { | 380 | if (s_result == MatchStructureResult::FullMatch) { |
| 379 | return ManageStructuralMatch(current_surface, params); | 381 | return ManageStructuralMatch(current_surface, params); |
| 380 | } else { | 382 | } else { |
| 381 | return RebuildMirage(current_surface, params); | 383 | return RebuildSurface(current_surface, params); |
| 382 | } | 384 | } |
| 383 | } | 385 | } |
| 384 | if (current_surface->GetSizeInBytes() <= candidate_size) { | 386 | if (current_surface->GetSizeInBytes() <= candidate_size) { |
| @@ -429,58 +431,40 @@ private: | |||
| 429 | } | 431 | } |
| 430 | staging_buffer.resize(surface->GetHostSizeInBytes()); | 432 | staging_buffer.resize(surface->GetHostSizeInBytes()); |
| 431 | surface->DownloadTexture(staging_buffer); | 433 | surface->DownloadTexture(staging_buffer); |
| 432 | surface->FlushBuffer(staging_buffer); | 434 | surface->FlushBuffer(*memory_manager, staging_buffer); |
| 433 | surface->MarkAsModified(false, Tick()); | 435 | surface->MarkAsModified(false, Tick()); |
| 434 | } | 436 | } |
| 435 | 437 | ||
| 436 | std::vector<TSurface> GetSurfacesInRegion(CacheAddr cache_addr, std::size_t size) const { | ||
| 437 | if (size == 0) { | ||
| 438 | return {}; | ||
| 439 | } | ||
| 440 | const IntervalType interval{cache_addr, cache_addr + size}; | ||
| 441 | |||
| 442 | std::vector<TSurface> surfaces; | ||
| 443 | for (auto& pair : boost::make_iterator_range(registered_surfaces.equal_range(interval))) { | ||
| 444 | for (auto& s : pair.second) { | ||
| 445 | if (!s || !s->IsRegistered()) { | ||
| 446 | continue; | ||
| 447 | } | ||
| 448 | surfaces.push_back(s); | ||
| 449 | } | ||
| 450 | } | ||
| 451 | return surfaces; | ||
| 452 | } | ||
| 453 | |||
| 454 | void RegisterInnerCache(TSurface& surface) { | 438 | void RegisterInnerCache(TSurface& surface) { |
| 455 | GPUVAddr start = surface->GetGpuAddr() >> inner_cache_page_bits; | 439 | CacheAddr start = surface->GetCacheAddr() >> registry_page_bits; |
| 456 | const GPUVAddr end = (surface->GetGpuAddrEnd() - 1) >> inner_cache_page_bits; | 440 | const CacheAddr end = (surface->GetCacheAddrEnd() - 1) >> registry_page_bits; |
| 457 | while (start <= end) { | 441 | while (start <= end) { |
| 458 | inner_cache[start].push_back(surface); | 442 | registry[start].push_back(surface); |
| 459 | start++; | 443 | start++; |
| 460 | } | 444 | } |
| 461 | } | 445 | } |
| 462 | 446 | ||
| 463 | void UnregisterInnerCache(TSurface& surface) { | 447 | void UnregisterInnerCache(TSurface& surface) { |
| 464 | GPUVAddr start = surface->GetGpuAddr() >> inner_cache_page_bits; | 448 | CacheAddr start = surface->GetCacheAddr() >> registry_page_bits; |
| 465 | const GPUVAddr end = (surface->GetGpuAddrEnd() - 1) >> inner_cache_page_bits; | 449 | const CacheAddr end = (surface->GetCacheAddrEnd() - 1) >> registry_page_bits; |
| 466 | while (start <= end) { | 450 | while (start <= end) { |
| 467 | inner_cache[start].remove(surface); | 451 | registry[start].remove(surface); |
| 468 | start++; | 452 | start++; |
| 469 | } | 453 | } |
| 470 | } | 454 | } |
| 471 | 455 | ||
| 472 | std::vector<TSurface> GetSurfacesInRegionInner(const GPUVAddr gpu_addr, const std::size_t size) { | 456 | std::vector<TSurface> GetSurfacesInRegion(const CacheAddr cache_addr, const std::size_t size) { |
| 473 | if (size == 0) { | 457 | if (size == 0) { |
| 474 | return {}; | 458 | return {}; |
| 475 | } | 459 | } |
| 476 | const GPUVAddr gpu_addr_end = gpu_addr + size; | 460 | const CacheAddr cache_addr_end = cache_addr + size; |
| 477 | GPUVAddr start = gpu_addr >> inner_cache_page_bits; | 461 | CacheAddr start = cache_addr >> registry_page_bits; |
| 478 | const GPUVAddr end = (gpu_addr_end - 1) >> inner_cache_page_bits; | 462 | const CacheAddr end = (cache_addr_end - 1) >> registry_page_bits; |
| 479 | std::vector<TSurface> surfaces; | 463 | std::vector<TSurface> surfaces; |
| 480 | while (start <= end) { | 464 | while (start <= end) { |
| 481 | std::list<TSurface>& list = inner_cache[start]; | 465 | std::list<TSurface>& list = registry[start]; |
| 482 | for (auto& s : list) { | 466 | for (auto& s : list) { |
| 483 | if (!s->IsPicked() && s->Overlaps(gpu_addr, gpu_addr_end)) { | 467 | if (!s->IsPicked() && s->Overlaps(cache_addr, cache_addr_end)) { |
| 484 | s->MarkAsPicked(true); | 468 | s->MarkAsPicked(true); |
| 485 | surfaces.push_back(s); | 469 | surfaces.push_back(s); |
| 486 | } | 470 | } |
| @@ -510,11 +494,6 @@ private: | |||
| 510 | return {}; | 494 | return {}; |
| 511 | } | 495 | } |
| 512 | 496 | ||
| 513 | IntervalType GetInterval(const void* host_ptr, const std::size_t size) const { | ||
| 514 | const CacheAddr addr = ToCacheAddr(host_ptr); | ||
| 515 | return IntervalType::right_open(addr, addr + size); | ||
| 516 | } | ||
| 517 | |||
| 518 | struct RenderInfo { | 497 | struct RenderInfo { |
| 519 | RenderTargetConfig config; | 498 | RenderTargetConfig config; |
| 520 | TSurface target; | 499 | TSurface target; |
| @@ -531,11 +510,12 @@ private: | |||
| 531 | 510 | ||
| 532 | u64 ticks{}; | 511 | u64 ticks{}; |
| 533 | 512 | ||
| 534 | IntervalMap registered_surfaces; | 513 | // The internal Cache is different for the Texture Cache. It's based on buckets |
| 535 | 514 | // of 1MB. This fits better for the purpose of this cache as textures are normaly | |
| 536 | static constexpr u64 inner_cache_page_bits{20}; | 515 | // large in size. |
| 537 | static constexpr u64 inner_cache_page_size{1 << inner_cache_page_bits}; | 516 | static constexpr u64 registry_page_bits{20}; |
| 538 | std::unordered_map<GPUVAddr, std::list<TSurface>> inner_cache; | 517 | static constexpr u64 registry_page_size{1 << registry_page_bits}; |
| 518 | std::unordered_map<CacheAddr, std::list<TSurface>> registry; | ||
| 539 | 519 | ||
| 540 | /// The surface reserve is a "backup" cache, this is where we put unique surfaces that have | 520 | /// The surface reserve is a "backup" cache, this is where we put unique surfaces that have |
| 541 | /// previously been used. This is to prevent surfaces from being constantly created and | 521 | /// previously been used. This is to prevent surfaces from being constantly created and |