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| author | 2018-12-21 02:22:18 -0300 | |
|---|---|---|
| committer | 2019-01-15 17:54:51 -0300 | |
| commit | ccb71bece9e6e6c9ceabc0826624f645c5140c53 (patch) | |
| tree | 3f434672f3675383bf0eb6d2a405099843652224 /src | |
| parent | shader_decode: Implement ISETP (diff) | |
| download | yuzu-ccb71bece9e6e6c9ceabc0826624f645c5140c53.tar.gz yuzu-ccb71bece9e6e6c9ceabc0826624f645c5140c53.tar.xz yuzu-ccb71bece9e6e6c9ceabc0826624f645c5140c53.zip | |
shader_decode: Implement IADD
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/decode/arithmetic_integer.cpp | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp index 12c64e97a..47b27ac5b 100644 --- a/src/video_core/shader/decode/arithmetic_integer.cpp +++ b/src/video_core/shader/decode/arithmetic_integer.cpp | |||
| @@ -16,7 +16,34 @@ u32 ShaderIR::DecodeArithmeticInteger(BasicBlock& bb, u32 pc) { | |||
| 16 | const Instruction instr = {program_code[pc]}; | 16 | const Instruction instr = {program_code[pc]}; |
| 17 | const auto opcode = OpCode::Decode(instr); | 17 | const auto opcode = OpCode::Decode(instr); |
| 18 | 18 | ||
| 19 | UNIMPLEMENTED(); | 19 | Node op_a = GetRegister(instr.gpr8); |
| 20 | Node op_b = [&]() { | ||
| 21 | if (instr.is_b_imm) { | ||
| 22 | return Immediate(instr.alu.GetSignedImm20_20()); | ||
| 23 | } else if (instr.is_b_gpr) { | ||
| 24 | return GetRegister(instr.gpr20); | ||
| 25 | } else { | ||
| 26 | return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset); | ||
| 27 | } | ||
| 28 | }(); | ||
| 29 | |||
| 30 | switch (opcode->get().GetId()) { | ||
| 31 | case OpCode::Id::IADD_C: | ||
| 32 | case OpCode::Id::IADD_R: | ||
| 33 | case OpCode::Id::IADD_IMM: { | ||
| 34 | UNIMPLEMENTED_IF_MSG(instr.generates_cc, | ||
| 35 | "Condition codes generation in IADD is not implemented"); | ||
| 36 | UNIMPLEMENTED_IF_MSG(instr.alu.saturate_d, "IADD saturation not implemented"); | ||
| 37 | |||
| 38 | op_a = GetOperandAbsNegInteger(op_a, false, instr.alu_integer.negate_a, true); | ||
| 39 | op_b = GetOperandAbsNegInteger(op_b, false, instr.alu_integer.negate_b, true); | ||
| 40 | |||
| 41 | SetRegister(bb, instr.gpr0, Operation(OperationCode::IAdd, PRECISE, op_a, op_b)); | ||
| 42 | break; | ||
| 43 | } | ||
| 44 | default: | ||
| 45 | UNIMPLEMENTED_MSG("Unhandled ArithmeticInteger instruction: {}", opcode->get().GetName()); | ||
| 46 | } | ||
| 20 | 47 | ||
| 21 | return pc; | 48 | return pc; |
| 22 | } | 49 | } |