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authorGravatar Tony Wasserka2014-12-12 18:31:37 +0100
committerGravatar Tony Wasserka2014-12-20 18:06:55 +0100
commitcb1804e0aba48826d671afb0500ae5eaeebd5c5a (patch)
treebcc03440eb7ac2c97ec4d99c68c079785205ecfb /src
parentPica/VertexShader: Some cleanups using std::array. (diff)
downloadyuzu-cb1804e0aba48826d671afb0500ae5eaeebd5c5a.tar.gz
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Pica/VertexShader: Move code around a bit.
Diffstat (limited to 'src')
-rw-r--r--src/video_core/vertex_shader.cpp100
1 files changed, 58 insertions, 42 deletions
diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp
index c98c625c2..33a862b74 100644
--- a/src/video_core/vertex_shader.cpp
+++ b/src/video_core/vertex_shader.cpp
@@ -86,6 +86,8 @@ static void ProcessShaderCode(VertexShaderState& state) {
86 bool increment_pc = true; 86 bool increment_pc = true;
87 bool exit_loop = false; 87 bool exit_loop = false;
88 const Instruction& instr = *(const Instruction*)state.program_counter; 88 const Instruction& instr = *(const Instruction*)state.program_counter;
89 const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id];
90
89 state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + (state.program_counter - shader_memory.data())); 91 state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + (state.program_counter - shader_memory.data()));
90 92
91 auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* { 93 auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
@@ -100,47 +102,52 @@ static void ProcessShaderCode(VertexShaderState& state) {
100 return &shader_uniforms.f[source_reg.GetIndex()].x; 102 return &shader_uniforms.f[source_reg.GetIndex()].x;
101 } 103 }
102 }; 104 };
103 bool is_inverted = 0 != (instr.opcode.GetInfo().subtype & Instruction::OpCodeInfo::SrcInversed);
104 const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted));
105 const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted));
106 float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()]
107 : (instr.common.dest < 0x10) ? nullptr
108 : (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0]
109 : nullptr;
110 105
111 const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id]; 106 switch (instr.opcode.GetInfo().type) {
112 const bool negate_src1 = (swizzle.negate_src1 != 0); 107 case Instruction::OpCodeType::Arithmetic:
113 const bool negate_src2 = (swizzle.negate_src2 != 0); 108 {
114 109 bool is_inverted = 0 != (instr.opcode.GetInfo().subtype & Instruction::OpCodeInfo::SrcInversed);
115 float24 src1[4] = { 110 const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted));
116 src1_[(int)swizzle.GetSelectorSrc1(0)], 111 const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted));
117 src1_[(int)swizzle.GetSelectorSrc1(1)], 112
118 src1_[(int)swizzle.GetSelectorSrc1(2)], 113 const bool negate_src1 = (swizzle.negate_src1 != 0);
119 src1_[(int)swizzle.GetSelectorSrc1(3)], 114 const bool negate_src2 = (swizzle.negate_src2 != 0);
120 }; 115
121 if (negate_src1) { 116 float24 src1[4] = {
122 src1[0] = src1[0] * float24::FromFloat32(-1); 117 src1_[(int)swizzle.GetSelectorSrc1(0)],
123 src1[1] = src1[1] * float24::FromFloat32(-1); 118 src1_[(int)swizzle.GetSelectorSrc1(1)],
124 src1[2] = src1[2] * float24::FromFloat32(-1); 119 src1_[(int)swizzle.GetSelectorSrc1(2)],
125 src1[3] = src1[3] * float24::FromFloat32(-1); 120 src1_[(int)swizzle.GetSelectorSrc1(3)],
126 } 121 };
127 float24 src2[4] = { 122 if (negate_src1) {
128 src2_[(int)swizzle.GetSelectorSrc2(0)], 123 src1[0] = src1[0] * float24::FromFloat32(-1);
129 src2_[(int)swizzle.GetSelectorSrc2(1)], 124 src1[1] = src1[1] * float24::FromFloat32(-1);
130 src2_[(int)swizzle.GetSelectorSrc2(2)], 125 src1[2] = src1[2] * float24::FromFloat32(-1);
131 src2_[(int)swizzle.GetSelectorSrc2(3)], 126 src1[3] = src1[3] * float24::FromFloat32(-1);
132 }; 127 }
133 if (negate_src2) { 128 float24 src2[4] = {
134 src2[0] = src2[0] * float24::FromFloat32(-1); 129 src2_[(int)swizzle.GetSelectorSrc2(0)],
135 src2[1] = src2[1] * float24::FromFloat32(-1); 130 src2_[(int)swizzle.GetSelectorSrc2(1)],
136 src2[2] = src2[2] * float24::FromFloat32(-1); 131 src2_[(int)swizzle.GetSelectorSrc2(2)],
137 src2[3] = src2[3] * float24::FromFloat32(-1); 132 src2_[(int)swizzle.GetSelectorSrc2(3)],
138 } 133 };
134 if (negate_src2) {
135 src2[0] = src2[0] * float24::FromFloat32(-1);
136 src2[1] = src2[1] * float24::FromFloat32(-1);
137 src2[2] = src2[2] * float24::FromFloat32(-1);
138 src2[3] = src2[3] * float24::FromFloat32(-1);
139 }
140
141 float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()]
142 : (instr.common.dest < 0x10) ? nullptr
143 : (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0]
144 : nullptr;
145
146 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
139 147
140 switch (instr.opcode) { 148 switch (instr.opcode) {
141 case Instruction::OpCode::ADD: 149 case Instruction::OpCode::ADD:
142 { 150 {
143 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
144 for (int i = 0; i < 4; ++i) { 151 for (int i = 0; i < 4; ++i) {
145 if (!swizzle.DestComponentEnabled(i)) 152 if (!swizzle.DestComponentEnabled(i))
146 continue; 153 continue;
@@ -153,7 +160,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
153 160
154 case Instruction::OpCode::MUL: 161 case Instruction::OpCode::MUL:
155 { 162 {
156 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
157 for (int i = 0; i < 4; ++i) { 163 for (int i = 0; i < 4; ++i) {
158 if (!swizzle.DestComponentEnabled(i)) 164 if (!swizzle.DestComponentEnabled(i))
159 continue; 165 continue;
@@ -167,7 +173,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
167 case Instruction::OpCode::DP3: 173 case Instruction::OpCode::DP3:
168 case Instruction::OpCode::DP4: 174 case Instruction::OpCode::DP4:
169 { 175 {
170 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
171 float24 dot = float24::FromFloat32(0.f); 176 float24 dot = float24::FromFloat32(0.f);
172 int num_components = (instr.opcode == Instruction::OpCode::DP3) ? 3 : 4; 177 int num_components = (instr.opcode == Instruction::OpCode::DP3) ? 3 : 4;
173 for (int i = 0; i < num_components; ++i) 178 for (int i = 0; i < num_components; ++i)
@@ -185,7 +190,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
185 // Reciprocal 190 // Reciprocal
186 case Instruction::OpCode::RCP: 191 case Instruction::OpCode::RCP:
187 { 192 {
188 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
189 for (int i = 0; i < 4; ++i) { 193 for (int i = 0; i < 4; ++i) {
190 if (!swizzle.DestComponentEnabled(i)) 194 if (!swizzle.DestComponentEnabled(i))
191 continue; 195 continue;
@@ -201,7 +205,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
201 // Reciprocal Square Root 205 // Reciprocal Square Root
202 case Instruction::OpCode::RSQ: 206 case Instruction::OpCode::RSQ:
203 { 207 {
204 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
205 for (int i = 0; i < 4; ++i) { 208 for (int i = 0; i < 4; ++i) {
206 if (!swizzle.DestComponentEnabled(i)) 209 if (!swizzle.DestComponentEnabled(i))
207 continue; 210 continue;
@@ -216,7 +219,6 @@ static void ProcessShaderCode(VertexShaderState& state) {
216 219
217 case Instruction::OpCode::MOV: 220 case Instruction::OpCode::MOV:
218 { 221 {
219 state.debug.max_opdesc_id = std::max<u32>(state.debug.max_opdesc_id, 1+instr.common.operand_desc_id);
220 for (int i = 0; i < 4; ++i) { 222 for (int i = 0; i < 4; ++i) {
221 if (!swizzle.DestComponentEnabled(i)) 223 if (!swizzle.DestComponentEnabled(i))
222 continue; 224 continue;
@@ -226,6 +228,17 @@ static void ProcessShaderCode(VertexShaderState& state) {
226 break; 228 break;
227 } 229 }
228 230
231 default:
232 LOG_ERROR(HW_GPU, "Unhandled arithmetic instruction: 0x%02x (%s): 0x%08x",
233 (int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex);
234 break;
235 }
236
237 break;
238 }
239 default:
240 // Process instruction explicitly
241 switch (instr.opcode) {
229 // NOP is currently used as a heuristic for leaving from a function. 242 // NOP is currently used as a heuristic for leaving from a function.
230 // TODO: This is completely incorrect. 243 // TODO: This is completely incorrect.
231 case Instruction::OpCode::NOP: 244 case Instruction::OpCode::NOP:
@@ -256,6 +269,9 @@ static void ProcessShaderCode(VertexShaderState& state) {
256 LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x", 269 LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
257 (int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex); 270 (int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex);
258 break; 271 break;
272 }
273
274 break;
259 } 275 }
260 276
261 if (increment_pc) 277 if (increment_pc)