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| author | 2015-05-09 22:45:05 -0400 | |
|---|---|---|
| committer | 2015-05-09 22:45:05 -0400 | |
| commit | ba0bfe7d82a241f1dbe449a1bdcc2a76c594c667 (patch) | |
| tree | e4274244ccd93c0b4e15e84f551c99382e8169d9 /src | |
| parent | Merge pull request #736 from yuriks/remove-BIT (diff) | |
| parent | rasterizer: Implemented combiner output scaling. (diff) | |
| download | yuzu-ba0bfe7d82a241f1dbe449a1bdcc2a76c594c667.tar.gz yuzu-ba0bfe7d82a241f1dbe449a1bdcc2a76c594c667.tar.xz yuzu-ba0bfe7d82a241f1dbe449a1bdcc2a76c594c667.zip | |
Merge pull request #726 from bunnei/gpu-improvements
GPU improvements
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/pica.h | 67 | ||||
| -rw-r--r-- | src/video_core/rasterizer.cpp | 49 | ||||
| -rw-r--r-- | src/video_core/vertex_shader.cpp | 20 |
3 files changed, 117 insertions, 19 deletions
diff --git a/src/video_core/pica.h b/src/video_core/pica.h index e4a91058c..5e169ff69 100644 --- a/src/video_core/pica.h +++ b/src/video_core/pica.h | |||
| @@ -226,7 +226,8 @@ struct Regs { | |||
| 226 | Texture1 = 0x4, | 226 | Texture1 = 0x4, |
| 227 | Texture2 = 0x5, | 227 | Texture2 = 0x5, |
| 228 | Texture3 = 0x6, | 228 | Texture3 = 0x6, |
| 229 | // 0x7-0xc = primary color?? | 229 | |
| 230 | PreviousBuffer = 0xd, | ||
| 230 | Constant = 0xe, | 231 | Constant = 0xe, |
| 231 | Previous = 0xf, | 232 | Previous = 0xf, |
| 232 | }; | 233 | }; |
| @@ -299,7 +300,18 @@ struct Regs { | |||
| 299 | BitField<24, 8, u32> const_a; | 300 | BitField<24, 8, u32> const_a; |
| 300 | }; | 301 | }; |
| 301 | 302 | ||
| 302 | INSERT_PADDING_WORDS(0x1); | 303 | union { |
| 304 | BitField< 0, 2, u32> color_scale; | ||
| 305 | BitField<16, 2, u32> alpha_scale; | ||
| 306 | }; | ||
| 307 | |||
| 308 | inline unsigned GetColorMultiplier() const { | ||
| 309 | return (color_scale < 3) ? (1 << color_scale) : 1; | ||
| 310 | } | ||
| 311 | |||
| 312 | inline unsigned GetAlphaMultiplier() const { | ||
| 313 | return (alpha_scale < 3) ? (1 << alpha_scale) : 1; | ||
| 314 | } | ||
| 303 | }; | 315 | }; |
| 304 | 316 | ||
| 305 | TevStageConfig tev_stage0; | 317 | TevStageConfig tev_stage0; |
| @@ -309,11 +321,36 @@ struct Regs { | |||
| 309 | TevStageConfig tev_stage2; | 321 | TevStageConfig tev_stage2; |
| 310 | INSERT_PADDING_WORDS(0x3); | 322 | INSERT_PADDING_WORDS(0x3); |
| 311 | TevStageConfig tev_stage3; | 323 | TevStageConfig tev_stage3; |
| 312 | INSERT_PADDING_WORDS(0x13); | 324 | INSERT_PADDING_WORDS(0x3); |
| 325 | |||
| 326 | union { | ||
| 327 | // Tev stages 0-3 write their output to the combiner buffer if the corresponding bit in | ||
| 328 | // these masks are set | ||
| 329 | BitField< 8, 4, u32> update_mask_rgb; | ||
| 330 | BitField<12, 4, u32> update_mask_a; | ||
| 331 | |||
| 332 | bool TevStageUpdatesCombinerBufferColor(unsigned stage_index) const { | ||
| 333 | return (stage_index < 4) && (update_mask_rgb & (1 << stage_index)); | ||
| 334 | } | ||
| 335 | |||
| 336 | bool TevStageUpdatesCombinerBufferAlpha(unsigned stage_index) const { | ||
| 337 | return (stage_index < 4) && (update_mask_a & (1 << stage_index)); | ||
| 338 | } | ||
| 339 | } tev_combiner_buffer_input; | ||
| 340 | |||
| 341 | INSERT_PADDING_WORDS(0xf); | ||
| 313 | TevStageConfig tev_stage4; | 342 | TevStageConfig tev_stage4; |
| 314 | INSERT_PADDING_WORDS(0x3); | 343 | INSERT_PADDING_WORDS(0x3); |
| 315 | TevStageConfig tev_stage5; | 344 | TevStageConfig tev_stage5; |
| 316 | INSERT_PADDING_WORDS(0x3); | 345 | |
| 346 | union { | ||
| 347 | BitField< 0, 8, u32> r; | ||
| 348 | BitField< 8, 8, u32> g; | ||
| 349 | BitField<16, 8, u32> b; | ||
| 350 | BitField<24, 8, u32> a; | ||
| 351 | } tev_combiner_buffer_color; | ||
| 352 | |||
| 353 | INSERT_PADDING_WORDS(0x2); | ||
| 317 | 354 | ||
| 318 | const std::array<Regs::TevStageConfig,6> GetTevStages() const { | 355 | const std::array<Regs::TevStageConfig,6> GetTevStages() const { |
| 319 | return { tev_stage0, tev_stage1, | 356 | return { tev_stage0, tev_stage1, |
| @@ -426,9 +463,7 @@ struct Regs { | |||
| 426 | D24S8 = 3 | 463 | D24S8 = 3 |
| 427 | }; | 464 | }; |
| 428 | 465 | ||
| 429 | /* | 466 | // Returns the number of bytes in the specified depth format |
| 430 | * Returns the number of bytes in the specified depth format | ||
| 431 | */ | ||
| 432 | static u32 BytesPerDepthPixel(DepthFormat format) { | 467 | static u32 BytesPerDepthPixel(DepthFormat format) { |
| 433 | switch (format) { | 468 | switch (format) { |
| 434 | case DepthFormat::D16: | 469 | case DepthFormat::D16: |
| @@ -443,6 +478,20 @@ struct Regs { | |||
| 443 | } | 478 | } |
| 444 | } | 479 | } |
| 445 | 480 | ||
| 481 | // Returns the number of bits per depth component of the specified depth format | ||
| 482 | static u32 DepthBitsPerPixel(DepthFormat format) { | ||
| 483 | switch (format) { | ||
| 484 | case DepthFormat::D16: | ||
| 485 | return 16; | ||
| 486 | case DepthFormat::D24: | ||
| 487 | case DepthFormat::D24S8: | ||
| 488 | return 24; | ||
| 489 | default: | ||
| 490 | LOG_CRITICAL(HW_GPU, "Unknown depth format %u", format); | ||
| 491 | UNIMPLEMENTED(); | ||
| 492 | } | ||
| 493 | } | ||
| 494 | |||
| 446 | struct { | 495 | struct { |
| 447 | // Components are laid out in reverse byte order, most significant bits first. | 496 | // Components are laid out in reverse byte order, most significant bits first. |
| 448 | enum ColorFormat : u32 { | 497 | enum ColorFormat : u32 { |
| @@ -784,8 +833,10 @@ struct Regs { | |||
| 784 | ADD_FIELD(tev_stage1); | 833 | ADD_FIELD(tev_stage1); |
| 785 | ADD_FIELD(tev_stage2); | 834 | ADD_FIELD(tev_stage2); |
| 786 | ADD_FIELD(tev_stage3); | 835 | ADD_FIELD(tev_stage3); |
| 836 | ADD_FIELD(tev_combiner_buffer_input); | ||
| 787 | ADD_FIELD(tev_stage4); | 837 | ADD_FIELD(tev_stage4); |
| 788 | ADD_FIELD(tev_stage5); | 838 | ADD_FIELD(tev_stage5); |
| 839 | ADD_FIELD(tev_combiner_buffer_color); | ||
| 789 | ADD_FIELD(output_merger); | 840 | ADD_FIELD(output_merger); |
| 790 | ADD_FIELD(framebuffer); | 841 | ADD_FIELD(framebuffer); |
| 791 | ADD_FIELD(vertex_attributes); | 842 | ADD_FIELD(vertex_attributes); |
| @@ -859,8 +910,10 @@ ASSERT_REG_POSITION(tev_stage0, 0xc0); | |||
| 859 | ASSERT_REG_POSITION(tev_stage1, 0xc8); | 910 | ASSERT_REG_POSITION(tev_stage1, 0xc8); |
| 860 | ASSERT_REG_POSITION(tev_stage2, 0xd0); | 911 | ASSERT_REG_POSITION(tev_stage2, 0xd0); |
| 861 | ASSERT_REG_POSITION(tev_stage3, 0xd8); | 912 | ASSERT_REG_POSITION(tev_stage3, 0xd8); |
| 913 | ASSERT_REG_POSITION(tev_combiner_buffer_input, 0xe0); | ||
| 862 | ASSERT_REG_POSITION(tev_stage4, 0xf0); | 914 | ASSERT_REG_POSITION(tev_stage4, 0xf0); |
| 863 | ASSERT_REG_POSITION(tev_stage5, 0xf8); | 915 | ASSERT_REG_POSITION(tev_stage5, 0xf8); |
| 916 | ASSERT_REG_POSITION(tev_combiner_buffer_color, 0xfd); | ||
| 864 | ASSERT_REG_POSITION(output_merger, 0x100); | 917 | ASSERT_REG_POSITION(output_merger, 0x100); |
| 865 | ASSERT_REG_POSITION(framebuffer, 0x110); | 918 | ASSERT_REG_POSITION(framebuffer, 0x110); |
| 866 | ASSERT_REG_POSITION(vertex_attributes, 0x200); | 919 | ASSERT_REG_POSITION(vertex_attributes, 0x200); |
diff --git a/src/video_core/rasterizer.cpp b/src/video_core/rasterizer.cpp index 3b3fef484..46a326bb4 100644 --- a/src/video_core/rasterizer.cpp +++ b/src/video_core/rasterizer.cpp | |||
| @@ -90,7 +90,7 @@ static const Math::Vec4<u8> GetPixel(int x, int y) { | |||
| 90 | UNIMPLEMENTED(); | 90 | UNIMPLEMENTED(); |
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | return {}; | 93 | return {0, 0, 0, 0}; |
| 94 | } | 94 | } |
| 95 | 95 | ||
| 96 | static u32 GetDepth(int x, int y) { | 96 | static u32 GetDepth(int x, int y) { |
| @@ -376,7 +376,13 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 376 | // with some basic arithmetic. Alpha combiners can be configured separately but work | 376 | // with some basic arithmetic. Alpha combiners can be configured separately but work |
| 377 | // analogously. | 377 | // analogously. |
| 378 | Math::Vec4<u8> combiner_output; | 378 | Math::Vec4<u8> combiner_output; |
| 379 | for (const auto& tev_stage : tev_stages) { | 379 | Math::Vec4<u8> combiner_buffer = { |
| 380 | registers.tev_combiner_buffer_color.r, registers.tev_combiner_buffer_color.g, | ||
| 381 | registers.tev_combiner_buffer_color.b, registers.tev_combiner_buffer_color.a | ||
| 382 | }; | ||
| 383 | |||
| 384 | for (unsigned tev_stage_index = 0; tev_stage_index < tev_stages.size(); ++tev_stage_index) { | ||
| 385 | const auto& tev_stage = tev_stages[tev_stage_index]; | ||
| 380 | using Source = Regs::TevStageConfig::Source; | 386 | using Source = Regs::TevStageConfig::Source; |
| 381 | using ColorModifier = Regs::TevStageConfig::ColorModifier; | 387 | using ColorModifier = Regs::TevStageConfig::ColorModifier; |
| 382 | using AlphaModifier = Regs::TevStageConfig::AlphaModifier; | 388 | using AlphaModifier = Regs::TevStageConfig::AlphaModifier; |
| @@ -398,6 +404,9 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 398 | case Source::Texture2: | 404 | case Source::Texture2: |
| 399 | return texture_color[2]; | 405 | return texture_color[2]; |
| 400 | 406 | ||
| 407 | case Source::PreviousBuffer: | ||
| 408 | return combiner_buffer; | ||
| 409 | |||
| 401 | case Source::Constant: | 410 | case Source::Constant: |
| 402 | return {tev_stage.const_r, tev_stage.const_g, tev_stage.const_b, tev_stage.const_a}; | 411 | return {tev_stage.const_r, tev_stage.const_g, tev_stage.const_b, tev_stage.const_a}; |
| 403 | 412 | ||
| @@ -407,7 +416,7 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 407 | default: | 416 | default: |
| 408 | LOG_ERROR(HW_GPU, "Unknown color combiner source %d\n", (int)source); | 417 | LOG_ERROR(HW_GPU, "Unknown color combiner source %d\n", (int)source); |
| 409 | UNIMPLEMENTED(); | 418 | UNIMPLEMENTED(); |
| 410 | return {}; | 419 | return {0, 0, 0, 0}; |
| 411 | } | 420 | } |
| 412 | }; | 421 | }; |
| 413 | 422 | ||
| @@ -490,6 +499,16 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 490 | return result.Cast<u8>(); | 499 | return result.Cast<u8>(); |
| 491 | } | 500 | } |
| 492 | 501 | ||
| 502 | case Operation::AddSigned: | ||
| 503 | { | ||
| 504 | // TODO(bunnei): Verify that the color conversion from (float) 0.5f to (byte) 128 is correct | ||
| 505 | auto result = input[0].Cast<int>() + input[1].Cast<int>() - Math::MakeVec<int>(128, 128, 128); | ||
| 506 | result.r() = MathUtil::Clamp<int>(result.r(), 0, 255); | ||
| 507 | result.g() = MathUtil::Clamp<int>(result.g(), 0, 255); | ||
| 508 | result.b() = MathUtil::Clamp<int>(result.b(), 0, 255); | ||
| 509 | return result.Cast<u8>(); | ||
| 510 | } | ||
| 511 | |||
| 493 | case Operation::Lerp: | 512 | case Operation::Lerp: |
| 494 | return ((input[0] * input[2] + input[1] * (Math::MakeVec<u8>(255, 255, 255) - input[2]).Cast<u8>()) / 255).Cast<u8>(); | 513 | return ((input[0] * input[2] + input[1] * (Math::MakeVec<u8>(255, 255, 255) - input[2]).Cast<u8>()) / 255).Cast<u8>(); |
| 495 | 514 | ||
| @@ -524,7 +543,7 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 524 | default: | 543 | default: |
| 525 | LOG_ERROR(HW_GPU, "Unknown color combiner operation %d\n", (int)op); | 544 | LOG_ERROR(HW_GPU, "Unknown color combiner operation %d\n", (int)op); |
| 526 | UNIMPLEMENTED(); | 545 | UNIMPLEMENTED(); |
| 527 | return {}; | 546 | return {0, 0, 0}; |
| 528 | } | 547 | } |
| 529 | }; | 548 | }; |
| 530 | 549 | ||
| @@ -578,7 +597,20 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 578 | }; | 597 | }; |
| 579 | auto alpha_output = AlphaCombine(tev_stage.alpha_op, alpha_result); | 598 | auto alpha_output = AlphaCombine(tev_stage.alpha_op, alpha_result); |
| 580 | 599 | ||
| 581 | combiner_output = Math::MakeVec(color_output, alpha_output); | 600 | combiner_output[0] = std::min((unsigned)255, color_output.r() * tev_stage.GetColorMultiplier()); |
| 601 | combiner_output[1] = std::min((unsigned)255, color_output.g() * tev_stage.GetColorMultiplier()); | ||
| 602 | combiner_output[2] = std::min((unsigned)255, color_output.b() * tev_stage.GetColorMultiplier()); | ||
| 603 | combiner_output[3] = std::min((unsigned)255, alpha_output * tev_stage.GetAlphaMultiplier()); | ||
| 604 | |||
| 605 | if (registers.tev_combiner_buffer_input.TevStageUpdatesCombinerBufferColor(tev_stage_index)) { | ||
| 606 | combiner_buffer.r() = combiner_output.r(); | ||
| 607 | combiner_buffer.g() = combiner_output.g(); | ||
| 608 | combiner_buffer.b() = combiner_output.b(); | ||
| 609 | } | ||
| 610 | |||
| 611 | if (registers.tev_combiner_buffer_input.TevStageUpdatesCombinerBufferAlpha(tev_stage_index)) { | ||
| 612 | combiner_buffer.a() = combiner_output.a(); | ||
| 613 | } | ||
| 582 | } | 614 | } |
| 583 | 615 | ||
| 584 | if (registers.output_merger.alpha_test.enable) { | 616 | if (registers.output_merger.alpha_test.enable) { |
| @@ -624,9 +656,10 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0, | |||
| 624 | 656 | ||
| 625 | // TODO: Does depth indeed only get written even if depth testing is enabled? | 657 | // TODO: Does depth indeed only get written even if depth testing is enabled? |
| 626 | if (registers.output_merger.depth_test_enable) { | 658 | if (registers.output_merger.depth_test_enable) { |
| 627 | u16 z = (u16)((v0.screenpos[2].ToFloat32() * w0 + | 659 | unsigned num_bits = Pica::Regs::DepthBitsPerPixel(registers.framebuffer.depth_format); |
| 628 | v1.screenpos[2].ToFloat32() * w1 + | 660 | u32 z = (u32)((v0.screenpos[2].ToFloat32() * w0 + |
| 629 | v2.screenpos[2].ToFloat32() * w2) * 65535.f / wsum); | 661 | v1.screenpos[2].ToFloat32() * w1 + |
| 662 | v2.screenpos[2].ToFloat32() * w2) * ((1 << num_bits) - 1) / wsum); | ||
| 630 | u32 ref_z = GetDepth(x >> 4, y >> 4); | 663 | u32 ref_z = GetDepth(x >> 4, y >> 4); |
| 631 | 664 | ||
| 632 | bool pass = false; | 665 | bool pass = false; |
diff --git a/src/video_core/vertex_shader.cpp b/src/video_core/vertex_shader.cpp index 51f4e58bf..885b7de59 100644 --- a/src/video_core/vertex_shader.cpp +++ b/src/video_core/vertex_shader.cpp | |||
| @@ -235,6 +235,15 @@ static void ProcessShaderCode(VertexShaderState& state) { | |||
| 235 | break; | 235 | break; |
| 236 | } | 236 | } |
| 237 | 237 | ||
| 238 | case OpCode::Id::FLR: | ||
| 239 | for (int i = 0; i < 4; ++i) { | ||
| 240 | if (!swizzle.DestComponentEnabled(i)) | ||
| 241 | continue; | ||
| 242 | |||
| 243 | dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32())); | ||
| 244 | } | ||
| 245 | break; | ||
| 246 | |||
| 238 | case OpCode::Id::MAX: | 247 | case OpCode::Id::MAX: |
| 239 | for (int i = 0; i < 4; ++i) { | 248 | for (int i = 0; i < 4; ++i) { |
| 240 | if (!swizzle.DestComponentEnabled(i)) | 249 | if (!swizzle.DestComponentEnabled(i)) |
| @@ -366,12 +375,15 @@ static void ProcessShaderCode(VertexShaderState& state) { | |||
| 366 | 375 | ||
| 367 | case OpCode::Type::MultiplyAdd: | 376 | case OpCode::Type::MultiplyAdd: |
| 368 | { | 377 | { |
| 369 | if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) { | 378 | if ((instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD) || |
| 379 | (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI)) { | ||
| 370 | const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.mad.operand_desc_id]; | 380 | const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.mad.operand_desc_id]; |
| 371 | 381 | ||
| 372 | const float24* src1_ = LookupSourceRegister(instr.mad.src1); | 382 | bool is_inverted = (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI); |
| 373 | const float24* src2_ = LookupSourceRegister(instr.mad.src2); | 383 | |
| 374 | const float24* src3_ = LookupSourceRegister(instr.mad.src3); | 384 | const float24* src1_ = LookupSourceRegister(instr.mad.GetSrc1(is_inverted)); |
| 385 | const float24* src2_ = LookupSourceRegister(instr.mad.GetSrc2(is_inverted)); | ||
| 386 | const float24* src3_ = LookupSourceRegister(instr.mad.GetSrc3(is_inverted)); | ||
| 375 | 387 | ||
| 376 | const bool negate_src1 = ((bool)swizzle.negate_src1 != false); | 388 | const bool negate_src1 = ((bool)swizzle.negate_src1 != false); |
| 377 | const bool negate_src2 = ((bool)swizzle.negate_src2 != false); | 389 | const bool negate_src2 = ((bool)swizzle.negate_src2 != false); |