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| author | 2015-05-31 03:33:07 -0400 | |
|---|---|---|
| committer | 2015-05-31 21:50:18 -0400 | |
| commit | b64dea80ce5d1413fb5dfcd94f19e77816b6bdf7 (patch) | |
| tree | 62b07b9fe6400fac6902876cd47c77a796c16c94 /src | |
| parent | Merge pull request #830 from SeannyM/qt-noborder (diff) | |
| download | yuzu-b64dea80ce5d1413fb5dfcd94f19e77816b6bdf7.tar.gz yuzu-b64dea80ce5d1413fb5dfcd94f19e77816b6bdf7.tar.xz yuzu-b64dea80ce5d1413fb5dfcd94f19e77816b6bdf7.zip | |
arm_dyncom_thumb: Implement REV, REV16, and REVSH.
Diffstat (limited to 'src')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_thumb.cpp | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 2fc8170be..78552293a 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp | |||
| @@ -274,9 +274,19 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { | |||
| 274 | ? 0xE24DDF00 // SUB | 274 | ? 0xE24DDF00 // SUB |
| 275 | : 0xE28DDF00) // ADD | 275 | : 0xE28DDF00) // ADD |
| 276 | |(tinstr & 0x007F); // off7 | 276 | |(tinstr & 0x007F); // off7 |
| 277 | } else if ((tinstr & 0x0F00) == 0x0e00) | 277 | } else if ((tinstr & 0x0F00) == 0x0e00) { |
| 278 | *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask | 278 | *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask |
| 279 | else { | 279 | } else if ((tinstr & 0x0F00) == 0x0a00) { |
| 280 | static const ARMword subset[3] = { | ||
| 281 | 0xE6BF0F30, // REV | ||
| 282 | 0xE6BF0FB0, // REV16 | ||
| 283 | 0xE6FF0FB0, // REVSH | ||
| 284 | }; | ||
| 285 | |||
| 286 | *ainstr = subset[BITS(tinstr, 6, 7)] // base | ||
| 287 | | (BITS(tinstr, 0, 2) << 12) // Rd | ||
| 288 | | BITS(tinstr, 3, 5); // Rm | ||
| 289 | } else { | ||
| 280 | static const ARMword subset[4] = { | 290 | static const ARMword subset[4] = { |
| 281 | 0xE92D0000, // STMDB sp!,{rlist} | 291 | 0xE92D0000, // STMDB sp!,{rlist} |
| 282 | 0xE92D4000, // STMDB sp!,{rlist,lr} | 292 | 0xE92D4000, // STMDB sp!,{rlist,lr} |