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| author | 2018-06-08 22:46:10 -0500 | |
|---|---|---|
| committer | 2018-06-08 22:46:10 -0500 | |
| commit | abec5f82e288fb537f11b4b8a29021fe2d6b7b65 (patch) | |
| tree | ac4e4535699fa3f8719f6cc3b64f624dad253311 /src | |
| parent | Merge pull request #505 from janisozaur/ccache-travis (diff) | |
| download | yuzu-abec5f82e288fb537f11b4b8a29021fe2d6b7b65.tar.gz yuzu-abec5f82e288fb537f11b4b8a29021fe2d6b7b65.tar.xz yuzu-abec5f82e288fb537f11b4b8a29021fe2d6b7b65.zip | |
GPU: Stub the SSY shader instruction.
This instruction tells the GPU where the flow reconverges in a non-uniform control flow scenario, we can ignore this when generating GLSL code.
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 2 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 5 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 32800392b..6cc442786 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h | |||
| @@ -410,6 +410,7 @@ class OpCode { | |||
| 410 | public: | 410 | public: |
| 411 | enum class Id { | 411 | enum class Id { |
| 412 | KIL, | 412 | KIL, |
| 413 | SSY, | ||
| 413 | BFE_C, | 414 | BFE_C, |
| 414 | BFE_R, | 415 | BFE_R, |
| 415 | BFE_IMM, | 416 | BFE_IMM, |
| @@ -596,6 +597,7 @@ private: | |||
| 596 | std::vector<Matcher> table = { | 597 | std::vector<Matcher> table = { |
| 597 | #define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name) | 598 | #define INST(bitstring, op, type, name) Detail::GetMatcher(bitstring, op, type, name) |
| 598 | INST("111000110011----", Id::KIL, Type::Flow, "KIL"), | 599 | INST("111000110011----", Id::KIL, Type::Flow, "KIL"), |
| 600 | INST("111000101001----", Id::SSY, Type::Flow, "SSY"), | ||
| 599 | INST("111000100100----", Id::BRA, Type::Flow, "BRA"), | 601 | INST("111000100100----", Id::BRA, Type::Flow, "BRA"), |
| 600 | INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"), | 602 | INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"), |
| 601 | INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"), | 603 | INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"), |
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 94c6bc4b2..033711b66 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |||
| @@ -1435,6 +1435,11 @@ private: | |||
| 1435 | regs.SetRegisterToInputAttibute(instr.gpr0, attribute.element, attribute.index); | 1435 | regs.SetRegisterToInputAttibute(instr.gpr0, attribute.element, attribute.index); |
| 1436 | break; | 1436 | break; |
| 1437 | } | 1437 | } |
| 1438 | case OpCode::Id::SSY: { | ||
| 1439 | // The SSY opcode tells the GPU where to re-converge divergent execution paths, we | ||
| 1440 | // can ignore this when generating GLSL code. | ||
| 1441 | break; | ||
| 1442 | } | ||
| 1438 | default: { | 1443 | default: { |
| 1439 | NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName()); | 1444 | NGLOG_CRITICAL(HW_GPU, "Unhandled instruction: {}", opcode->GetName()); |
| 1440 | UNREACHABLE(); | 1445 | UNREACHABLE(); |