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authorGravatar bunnei2014-06-05 00:20:11 -0400
committerGravatar bunnei2014-06-05 00:20:11 -0400
commit9ece9da50d7c7827b9eb3bb9cfb007fb4af07061 (patch)
treee4f644a5ca93dcf18bc5c81259a4db69ff139419 /src
parentservice: added a error log messages for unimplemented WaitSynchronization (diff)
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arm: fixed bug in how thread context switch occurs with SkyEye
Diffstat (limited to 'src')
-rw-r--r--src/core/arm/interpreter/arm_interpreter.cpp7
-rw-r--r--src/core/hle/svc.h4
2 files changed, 9 insertions, 2 deletions
diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp
index 2aa100e86..8030ec56a 100644
--- a/src/core/arm/interpreter/arm_interpreter.cpp
+++ b/src/core/arm/interpreter/arm_interpreter.cpp
@@ -118,6 +118,9 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
118 118
119 ctx.fpscr = state->VFP[1]; 119 ctx.fpscr = state->VFP[1];
120 ctx.fpexc = state->VFP[2]; 120 ctx.fpexc = state->VFP[2];
121
122 ctx.reg_15 = state->Reg[15];
123 ctx.mode = state->NextInstr;
121} 124}
122 125
123/** 126/**
@@ -137,8 +140,8 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
137 state->VFP[1] = ctx.fpscr; 140 state->VFP[1] = ctx.fpscr;
138 state->VFP[2] = ctx.fpexc; 141 state->VFP[2] = ctx.fpexc;
139 142
140 state->Reg[15] = ctx.pc; 143 state->Reg[15] = ctx.reg_15;
141 state->NextInstr = RESUME; 144 state->NextInstr = ctx.mode;
142} 145}
143 146
144/// Prepare core for thread reschedule (if needed to correctly handle state) 147/// Prepare core for thread reschedule (if needed to correctly handle state)
diff --git a/src/core/hle/svc.h b/src/core/hle/svc.h
index c5170aab7..1d125faf6 100644
--- a/src/core/hle/svc.h
+++ b/src/core/hle/svc.h
@@ -29,6 +29,10 @@ struct ThreadContext {
29 u32 fpu_registers[32]; 29 u32 fpu_registers[32];
30 u32 fpscr; 30 u32 fpscr;
31 u32 fpexc; 31 u32 fpexc;
32
33 // These are not part of native ThreadContext, but needed by emu
34 u32 reg_15;
35 u32 mode;
32}; 36};
33 37
34enum ResetType { 38enum ResetType {