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| author | 2018-12-20 23:56:21 -0300 | |
|---|---|---|
| committer | 2019-01-15 17:54:50 -0300 | |
| commit | 964ddeeb90b655d8b5558002db7c780c0394263c (patch) | |
| tree | f170b3e8681a94d694961e141114f74d7141a9ef /src | |
| parent | shader_decode: Implement FADD_C, FADD_R and FADD_IMM (diff) | |
| download | yuzu-964ddeeb90b655d8b5558002db7c780c0394263c.tar.gz yuzu-964ddeeb90b655d8b5558002db7c780c0394263c.tar.xz yuzu-964ddeeb90b655d8b5558002db7c780c0394263c.zip | |
shader_decode: Implement MUFU
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/decode/arithmetic.cpp | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp index d196d94b5..fb688c324 100644 --- a/src/video_core/shader/decode/arithmetic.cpp +++ b/src/video_core/shader/decode/arithmetic.cpp | |||
| @@ -93,6 +93,35 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) { | |||
| 93 | SetRegister(bb, instr.gpr0, value); | 93 | SetRegister(bb, instr.gpr0, value); |
| 94 | break; | 94 | break; |
| 95 | } | 95 | } |
| 96 | case OpCode::Id::MUFU: { | ||
| 97 | op_a = GetOperandAbsNegFloat(op_a, instr.alu.abs_a, instr.alu.negate_a); | ||
| 98 | |||
| 99 | Node value = [&]() { | ||
| 100 | switch (instr.sub_op) { | ||
| 101 | case SubOp::Cos: | ||
| 102 | return Operation(OperationCode::FCos, PRECISE, op_a); | ||
| 103 | case SubOp::Sin: | ||
| 104 | return Operation(OperationCode::FSin, PRECISE, op_a); | ||
| 105 | case SubOp::Ex2: | ||
| 106 | return Operation(OperationCode::FExp2, PRECISE, op_a); | ||
| 107 | case SubOp::Lg2: | ||
| 108 | return Operation(OperationCode::FLog2, PRECISE, op_a); | ||
| 109 | case SubOp::Rcp: | ||
| 110 | return Operation(OperationCode::FDiv, PRECISE, Immediate(1.0f), op_a); | ||
| 111 | case SubOp::Rsq: | ||
| 112 | return Operation(OperationCode::FInverseSqrt, PRECISE, op_a); | ||
| 113 | case SubOp::Sqrt: | ||
| 114 | return Operation(OperationCode::FSqrt, PRECISE, op_a); | ||
| 115 | default: | ||
| 116 | UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}", | ||
| 117 | static_cast<unsigned>(instr.sub_op.Value())); | ||
| 118 | } | ||
| 119 | }(); | ||
| 120 | value = GetSaturatedFloat(value, instr.alu.saturate_d); | ||
| 121 | |||
| 122 | SetRegister(bb, instr.gpr0, value); | ||
| 123 | break; | ||
| 124 | } | ||
| 96 | default: | 125 | default: |
| 97 | UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName()); | 126 | UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName()); |
| 98 | } | 127 | } |