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authorGravatar heapo2018-12-14 17:10:14 -0800
committerGravatar heapo2018-12-17 07:56:25 -0800
commit72599cc667046cbd588fe1c4e3e3c7b55b272e29 (patch)
tree3662b6d0ec5999c63c82aba4531ce91c3245afc9 /src
parentMerge pull request #1899 from lioncash/state (diff)
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Implement postfactor multiplication/division for fmul instructions
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/shader_bytecode.h2
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp24
2 files changed, 21 insertions, 5 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index 5ea094e64..5198cd268 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -575,7 +575,7 @@ union Instruction {
575 575
576 union { 576 union {
577 BitField<39, 2, u64> tab5cb8_2; 577 BitField<39, 2, u64> tab5cb8_2;
578 BitField<41, 3, u64> tab5c68_1; 578 BitField<41, 3, u64> postfactor;
579 BitField<44, 2, u64> tab5c68_0; 579 BitField<44, 2, u64> tab5c68_0;
580 BitField<48, 1, u64> negate_b; 580 BitField<48, 1, u64> negate_b;
581 } fmul; 581 } fmul;
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index a5cfa0070..bd61af463 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -1867,9 +1867,6 @@ private:
1867 UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0, 1867 UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0,
1868 "FMUL tab5cb8_2({}) is not implemented", 1868 "FMUL tab5cb8_2({}) is not implemented",
1869 instr.fmul.tab5cb8_2.Value()); 1869 instr.fmul.tab5cb8_2.Value());
1870 UNIMPLEMENTED_IF_MSG(instr.fmul.tab5c68_1 != 0,
1871 "FMUL tab5cb8_1({}) is not implemented",
1872 instr.fmul.tab5c68_1.Value());
1873 UNIMPLEMENTED_IF_MSG( 1870 UNIMPLEMENTED_IF_MSG(
1874 instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented", 1871 instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented",
1875 instr.fmul.tab5c68_0 1872 instr.fmul.tab5c68_0
@@ -1879,7 +1876,26 @@ private:
1879 1876
1880 op_b = GetOperandAbsNeg(op_b, false, instr.fmul.negate_b); 1877 op_b = GetOperandAbsNeg(op_b, false, instr.fmul.negate_b);
1881 1878
1882 regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b, 1, 1, 1879 std::string postfactor_op;
1880 if (instr.fmul.postfactor != 0) {
1881 s8 postfactor = static_cast<s8>(instr.fmul.postfactor);
1882
1883 // postfactor encoded as 3-bit 1's complement in instruction,
1884 // interpreted with below logic.
1885 if (postfactor >= 4) {
1886 postfactor = 7 - postfactor;
1887 } else {
1888 postfactor = 0 - postfactor;
1889 }
1890
1891 if (postfactor > 0) {
1892 postfactor_op = " * " + std::to_string(1 << postfactor);
1893 } else {
1894 postfactor_op = " / " + std::to_string(1 << -postfactor);
1895 }
1896 }
1897
1898 regs.SetRegisterToFloat(instr.gpr0, 0, op_a + " * " + op_b + postfactor_op, 1, 1,
1883 instr.alu.saturate_d, 0, true); 1899 instr.alu.saturate_d, 0, true);
1884 break; 1900 break;
1885 } 1901 }