summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorGravatar bunnei2018-06-26 14:38:53 -0400
committerGravatar bunnei2018-06-27 00:08:04 -0400
commit6a28a66832c9ea98738ce5cf8527bc83f74c40f6 (patch)
tree36523a06eb9a08cf4a8e4f67df2671b7333130ad /src
parentsettings: Add a configuration for use_accurate_framebuffers. (diff)
downloadyuzu-6a28a66832c9ea98738ce5cf8527bc83f74c40f6.tar.gz
yuzu-6a28a66832c9ea98738ce5cf8527bc83f74c40f6.tar.xz
yuzu-6a28a66832c9ea98738ce5cf8527bc83f74c40f6.zip
maxwell_3d: Add a struct for RenderTargetConfig.
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/maxwell_3d.h36
1 files changed, 19 insertions, 17 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 2dc251205..180be4ff4 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -321,6 +321,24 @@ public:
321 INSERT_PADDING_WORDS(1); 321 INSERT_PADDING_WORDS(1);
322 }; 322 };
323 323
324 struct RenderTargetConfig {
325 u32 address_high;
326 u32 address_low;
327 u32 width;
328 u32 height;
329 Tegra::RenderTargetFormat format;
330 u32 block_dimensions;
331 u32 array_mode;
332 u32 layer_stride;
333 u32 base_layer;
334 INSERT_PADDING_WORDS(7);
335
336 GPUVAddr Address() const {
337 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
338 address_low);
339 }
340 };
341
324 union { 342 union {
325 struct { 343 struct {
326 INSERT_PADDING_WORDS(0x45); 344 INSERT_PADDING_WORDS(0x45);
@@ -333,23 +351,7 @@ public:
333 351
334 INSERT_PADDING_WORDS(0x1B8); 352 INSERT_PADDING_WORDS(0x1B8);
335 353
336 struct { 354 RenderTargetConfig rt[NumRenderTargets];
337 u32 address_high;
338 u32 address_low;
339 u32 width;
340 u32 height;
341 Tegra::RenderTargetFormat format;
342 u32 block_dimensions;
343 u32 array_mode;
344 u32 layer_stride;
345 u32 base_layer;
346 INSERT_PADDING_WORDS(7);
347
348 GPUVAddr Address() const {
349 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
350 address_low);
351 }
352 } rt[NumRenderTargets];
353 355
354 struct { 356 struct {
355 f32 scale_x; 357 f32 scale_x;