diff options
| author | 2020-03-22 20:34:52 +0700 | |
|---|---|---|
| committer | 2020-04-05 10:31:30 +0700 | |
| commit | 5cd585700069b0b277b41a434b3880839cca27d3 (patch) | |
| tree | ddea576800aa1c41e89dbeae3a002d26e239391d /src | |
| parent | reimplement get component type, uncomment mistaken code (diff) | |
| download | yuzu-5cd585700069b0b277b41a434b3880839cca27d3.tar.gz yuzu-5cd585700069b0b277b41a434b3880839cca27d3.tar.xz yuzu-5cd585700069b0b277b41a434b3880839cca27d3.zip | |
cleanup debug code.
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/decode/image.cpp | 17 |
1 files changed, 3 insertions, 14 deletions
diff --git a/src/video_core/shader/decode/image.cpp b/src/video_core/shader/decode/image.cpp index 34010a162..e6cc831fc 100644 --- a/src/video_core/shader/decode/image.cpp +++ b/src/video_core/shader/decode/image.cpp | |||
| @@ -2,6 +2,8 @@ | |||
| 2 | // Licensed under GPLv2 or any later version | 2 | // Licensed under GPLv2 or any later version |
| 3 | // Refer to the license.txt file included. | 3 | // Refer to the license.txt file included. |
| 4 | 4 | ||
| 5 | #pragma optimize("", off) | ||
| 6 | |||
| 5 | #include <algorithm> | 7 | #include <algorithm> |
| 6 | #include <vector> | 8 | #include <vector> |
| 7 | #include <fmt/format.h> | 9 | #include <fmt/format.h> |
| @@ -340,7 +342,6 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) { | |||
| 340 | original_value, Immediate(128.f)); | 342 | original_value, Immediate(128.f)); |
| 341 | return SignedOperation(OperationCode::ICastFloat, is_signed, NO_PRECISE, | 343 | return SignedOperation(OperationCode::ICastFloat, is_signed, NO_PRECISE, |
| 342 | std::move(cnv_value)); | 344 | std::move(cnv_value)); |
| 343 | return cnv_value; | ||
| 344 | } | 345 | } |
| 345 | case ComponentType::UNORM: { | 346 | case ComponentType::UNORM: { |
| 346 | // range [0.0, 1.0] | 347 | // range [0.0, 1.0] |
| @@ -349,7 +350,6 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) { | |||
| 349 | is_signed = false; | 350 | is_signed = false; |
| 350 | return SignedOperation(OperationCode::ICastFloat, is_signed, NO_PRECISE, | 351 | return SignedOperation(OperationCode::ICastFloat, is_signed, NO_PRECISE, |
| 351 | std::move(cnv_value)); | 352 | std::move(cnv_value)); |
| 352 | return cnv_value; | ||
| 353 | } | 353 | } |
| 354 | case ComponentType::SINT: // range [-128,128] | 354 | case ComponentType::SINT: // range [-128,128] |
| 355 | return original_value; | 355 | return original_value; |
| @@ -357,12 +357,6 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) { | |||
| 357 | is_signed = false; | 357 | is_signed = false; |
| 358 | return original_value; | 358 | return original_value; |
| 359 | case ComponentType::FLOAT: | 359 | case ComponentType::FLOAT: |
| 360 | if (component_size == 8) { | ||
| 361 | auto cnv_value = Operation(OperationCode::FMul, NO_PRECISE, | ||
| 362 | original_value, Immediate(255.f)); | ||
| 363 | return SignedOperation(OperationCode::ICastFloat, is_signed, | ||
| 364 | NO_PRECISE, std::move(cnv_value)); | ||
| 365 | } | ||
| 366 | return original_value; | 360 | return original_value; |
| 367 | default: | 361 | default: |
| 368 | UNIMPLEMENTED_MSG("Unimplement component type={}", component_type); | 362 | UNIMPLEMENTED_MSG("Unimplement component type={}", component_type); |
| @@ -379,12 +373,7 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) { | |||
| 379 | } | 373 | } |
| 380 | 374 | ||
| 381 | // add value into result | 375 | // add value into result |
| 382 | if (element == 0) { | 376 | value = Operation(OperationCode::UBitwiseOr, value, std::move(converted_value)); |
| 383 | value = original_value; | ||
| 384 | } else { | ||
| 385 | value = | ||
| 386 | Operation(OperationCode::UBitwiseOr, value, std::move(converted_value)); | ||
| 387 | } | ||
| 388 | break; | 377 | break; |
| 389 | } | 378 | } |
| 390 | SetRegister(bb, instr.gpr0.Value(), std::move(value)); | 379 | SetRegister(bb, instr.gpr0.Value(), std::move(value)); |