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| author | 2019-11-06 01:39:41 -0300 | |
|---|---|---|
| committer | 2019-12-22 22:55:06 -0300 | |
| commit | 5770418fb348fb6a2f5c9ada3e5e20e683fb309b (patch) | |
| tree | c82163a7ef44b032a716f06f6241a10e8b0b735b /src | |
| parent | Merge pull request #3241 from ReinUsesLisp/gl-shader-cache (diff) | |
| download | yuzu-5770418fb348fb6a2f5c9ada3e5e20e683fb309b.tar.gz yuzu-5770418fb348fb6a2f5c9ada3e5e20e683fb309b.tar.xz yuzu-5770418fb348fb6a2f5c9ada3e5e20e683fb309b.zip | |
maxwell_3d: Add depth bounds registers
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index dbb4e597f..2bd10cee5 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -707,13 +707,15 @@ public: | |||
| 707 | 707 | ||
| 708 | u32 color_mask_common; | 708 | u32 color_mask_common; |
| 709 | 709 | ||
| 710 | INSERT_UNION_PADDING_WORDS(0x6); | 710 | INSERT_UNION_PADDING_WORDS(0x2); |
| 711 | |||
| 712 | u32 rt_separate_frag_data; | ||
| 713 | 711 | ||
| 714 | f32 depth_bounds[2]; | 712 | f32 depth_bounds[2]; |
| 715 | 713 | ||
| 716 | INSERT_UNION_PADDING_WORDS(0xA); | 714 | INSERT_UNION_PADDING_WORDS(0x2); |
| 715 | |||
| 716 | u32 rt_separate_frag_data; | ||
| 717 | |||
| 718 | INSERT_UNION_PADDING_WORDS(0xC); | ||
| 717 | 719 | ||
| 718 | struct { | 720 | struct { |
| 719 | u32 address_high; | 721 | u32 address_high; |
| @@ -1030,7 +1032,12 @@ public: | |||
| 1030 | BitField<4, 1, u32> depth_clamp_far; | 1032 | BitField<4, 1, u32> depth_clamp_far; |
| 1031 | } view_volume_clip_control; | 1033 | } view_volume_clip_control; |
| 1032 | 1034 | ||
| 1033 | INSERT_UNION_PADDING_WORDS(0x21); | 1035 | INSERT_UNION_PADDING_WORDS(0x1F); |
| 1036 | |||
| 1037 | u32 depth_bounds_enable; | ||
| 1038 | |||
| 1039 | INSERT_UNION_PADDING_WORDS(1); | ||
| 1040 | |||
| 1034 | struct { | 1041 | struct { |
| 1035 | u32 enable; | 1042 | u32 enable; |
| 1036 | LogicOperation operation; | 1043 | LogicOperation operation; |
| @@ -1439,7 +1446,7 @@ ASSERT_REG_POSITION(stencil_back_func_mask, 0x3D6); | |||
| 1439 | ASSERT_REG_POSITION(stencil_back_mask, 0x3D7); | 1446 | ASSERT_REG_POSITION(stencil_back_mask, 0x3D7); |
| 1440 | ASSERT_REG_POSITION(color_mask_common, 0x3E4); | 1447 | ASSERT_REG_POSITION(color_mask_common, 0x3E4); |
| 1441 | ASSERT_REG_POSITION(rt_separate_frag_data, 0x3EB); | 1448 | ASSERT_REG_POSITION(rt_separate_frag_data, 0x3EB); |
| 1442 | ASSERT_REG_POSITION(depth_bounds, 0x3EC); | 1449 | ASSERT_REG_POSITION(depth_bounds, 0x3E7); |
| 1443 | ASSERT_REG_POSITION(zeta, 0x3F8); | 1450 | ASSERT_REG_POSITION(zeta, 0x3F8); |
| 1444 | ASSERT_REG_POSITION(clear_flags, 0x43E); | 1451 | ASSERT_REG_POSITION(clear_flags, 0x43E); |
| 1445 | ASSERT_REG_POSITION(vertex_attrib_format, 0x458); | 1452 | ASSERT_REG_POSITION(vertex_attrib_format, 0x458); |
| @@ -1495,6 +1502,7 @@ ASSERT_REG_POSITION(cull, 0x646); | |||
| 1495 | ASSERT_REG_POSITION(pixel_center_integer, 0x649); | 1502 | ASSERT_REG_POSITION(pixel_center_integer, 0x649); |
| 1496 | ASSERT_REG_POSITION(viewport_transform_enabled, 0x64B); | 1503 | ASSERT_REG_POSITION(viewport_transform_enabled, 0x64B); |
| 1497 | ASSERT_REG_POSITION(view_volume_clip_control, 0x64F); | 1504 | ASSERT_REG_POSITION(view_volume_clip_control, 0x64F); |
| 1505 | ASSERT_REG_POSITION(depth_bounds_enable, 0x66F); | ||
| 1498 | ASSERT_REG_POSITION(logic_op, 0x671); | 1506 | ASSERT_REG_POSITION(logic_op, 0x671); |
| 1499 | ASSERT_REG_POSITION(clear_buffers, 0x674); | 1507 | ASSERT_REG_POSITION(clear_buffers, 0x674); |
| 1500 | ASSERT_REG_POSITION(color_mask, 0x680); | 1508 | ASSERT_REG_POSITION(color_mask, 0x680); |