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| author | 2019-09-19 20:56:29 -0400 | |
|---|---|---|
| committer | 2019-09-19 20:56:29 -0400 | |
| commit | 4b81d19a1a4f3edd09a5e83d0ceae43462cb4ef1 (patch) | |
| tree | c022e3cad9d2e702b4640c51bb9fa5f4d409ee17 /src | |
| parent | Merge pull request #2784 from ReinUsesLisp/smem (diff) | |
| download | yuzu-4b81d19a1a4f3edd09a5e83d0ceae43462cb4ef1.tar.gz yuzu-4b81d19a1a4f3edd09a5e83d0ceae43462cb4ef1.tar.xz yuzu-4b81d19a1a4f3edd09a5e83d0ceae43462cb4ef1.zip | |
Shader_IR: Implement ICMP.
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 11 | ||||
| -rw-r--r-- | src/video_core/shader/decode/arithmetic_integer.cpp | 26 |
2 files changed, 37 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 052e6d24e..82d912c76 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h | |||
| @@ -934,6 +934,11 @@ union Instruction { | |||
| 934 | } isetp; | 934 | } isetp; |
| 935 | 935 | ||
| 936 | union { | 936 | union { |
| 937 | BitField<48, 1, u64> is_signed; | ||
| 938 | BitField<49, 3, PredCondition> cond; | ||
| 939 | } icmp; | ||
| 940 | |||
| 941 | union { | ||
| 937 | BitField<0, 3, u64> pred0; | 942 | BitField<0, 3, u64> pred0; |
| 938 | BitField<3, 3, u64> pred3; | 943 | BitField<3, 3, u64> pred3; |
| 939 | BitField<12, 3, u64> pred12; | 944 | BitField<12, 3, u64> pred12; |
| @@ -1628,6 +1633,9 @@ public: | |||
| 1628 | SEL_C, | 1633 | SEL_C, |
| 1629 | SEL_R, | 1634 | SEL_R, |
| 1630 | SEL_IMM, | 1635 | SEL_IMM, |
| 1636 | ICMP_RC, | ||
| 1637 | ICMP_R, | ||
| 1638 | ICMP_CR, | ||
| 1631 | MUFU, // Multi-Function Operator | 1639 | MUFU, // Multi-Function Operator |
| 1632 | RRO_C, // Range Reduction Operator | 1640 | RRO_C, // Range Reduction Operator |
| 1633 | RRO_R, | 1641 | RRO_R, |
| @@ -1892,6 +1900,9 @@ private: | |||
| 1892 | INST("0100110010100---", Id::SEL_C, Type::ArithmeticInteger, "SEL_C"), | 1900 | INST("0100110010100---", Id::SEL_C, Type::ArithmeticInteger, "SEL_C"), |
| 1893 | INST("0101110010100---", Id::SEL_R, Type::ArithmeticInteger, "SEL_R"), | 1901 | INST("0101110010100---", Id::SEL_R, Type::ArithmeticInteger, "SEL_R"), |
| 1894 | INST("0011100-10100---", Id::SEL_IMM, Type::ArithmeticInteger, "SEL_IMM"), | 1902 | INST("0011100-10100---", Id::SEL_IMM, Type::ArithmeticInteger, "SEL_IMM"), |
| 1903 | INST("010100110100----", Id::ICMP_RC, Type::ArithmeticInteger, "ICMP_RC"), | ||
| 1904 | INST("010110110100----", Id::ICMP_R, Type::ArithmeticInteger, "ICMP_R"), | ||
| 1905 | INST("010010110100----", Id::ICMP_CR, Type::ArithmeticInteger, "ICMP_CR"), | ||
| 1895 | INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"), | 1906 | INST("0101101111011---", Id::LEA_R2, Type::ArithmeticInteger, "LEA_R2"), |
| 1896 | INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"), | 1907 | INST("0101101111010---", Id::LEA_R1, Type::ArithmeticInteger, "LEA_R1"), |
| 1897 | INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"), | 1908 | INST("001101101101----", Id::LEA_IMM, Type::ArithmeticInteger, "LEA_IMM"), |
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp index c8c1a7f40..1aa21010a 100644 --- a/src/video_core/shader/decode/arithmetic_integer.cpp +++ b/src/video_core/shader/decode/arithmetic_integer.cpp | |||
| @@ -138,6 +138,32 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) { | |||
| 138 | SetRegister(bb, instr.gpr0, value); | 138 | SetRegister(bb, instr.gpr0, value); |
| 139 | break; | 139 | break; |
| 140 | } | 140 | } |
| 141 | case OpCode::Id::ICMP_CR: | ||
| 142 | case OpCode::Id::ICMP_R: | ||
| 143 | case OpCode::Id::ICMP_RC: { | ||
| 144 | UNIMPLEMENTED_IF(instr.icmp.is_signed != 0); | ||
| 145 | const Node zero = Immediate(0); | ||
| 146 | |||
| 147 | const auto [op_a, op_b] = [&]() -> std::tuple<Node, Node> { | ||
| 148 | switch (opcode->get().GetId()) { | ||
| 149 | case OpCode::Id::ICMP_CR: | ||
| 150 | return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset), | ||
| 151 | GetRegister(instr.gpr39)}; | ||
| 152 | case OpCode::Id::ICMP_R: | ||
| 153 | return {GetRegister(instr.gpr20), GetRegister(instr.gpr39)}; | ||
| 154 | case OpCode::Id::ICMP_RC: | ||
| 155 | return {GetRegister(instr.gpr39), | ||
| 156 | GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)}; | ||
| 157 | default: | ||
| 158 | UNIMPLEMENTED(); | ||
| 159 | return {zero, zero}; | ||
| 160 | } | ||
| 161 | }(); | ||
| 162 | const Node test = GetRegister(instr.gpr8); | ||
| 163 | const Node comparison = GetPredicateComparisonInteger(instr.icmp.cond, false, test, zero); | ||
| 164 | SetRegister(bb, instr.gpr0, Operation(OperationCode::Select, comparison, op_a, op_b)); | ||
| 165 | break; | ||
| 166 | } | ||
| 141 | case OpCode::Id::LOP_C: | 167 | case OpCode::Id::LOP_C: |
| 142 | case OpCode::Id::LOP_R: | 168 | case OpCode::Id::LOP_R: |
| 143 | case OpCode::Id::LOP_IMM: { | 169 | case OpCode::Id::LOP_IMM: { |