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authorGravatar Subv2018-04-23 22:14:08 -0500
committerGravatar Subv2018-04-25 11:55:29 -0500
commit378c881427d34962461099ef3d55de871710b897 (patch)
tree02fafb195dc84419f3d69d5af7e08799e984a803 /src
parentGPU: Added boilerplate code for the Fermi2D engine (diff)
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GPU: Added surface copy registers to Fermi2D
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/fermi_2d.h58
1 files changed, 57 insertions, 1 deletions
diff --git a/src/video_core/engines/fermi_2d.h b/src/video_core/engines/fermi_2d.h
index a97f5bb28..78d06218f 100644
--- a/src/video_core/engines/fermi_2d.h
+++ b/src/video_core/engines/fermi_2d.h
@@ -6,8 +6,10 @@
6 6
7#include <array> 7#include <array>
8#include "common/assert.h" 8#include "common/assert.h"
9#include "common/bit_field.h"
9#include "common/common_funcs.h" 10#include "common/common_funcs.h"
10#include "common/common_types.h" 11#include "common/common_types.h"
12#include "video_core/gpu.h"
11#include "video_core/memory_manager.h" 13#include "video_core/memory_manager.h"
12 14
13namespace Tegra { 15namespace Tegra {
@@ -27,9 +29,59 @@ public:
27 struct Regs { 29 struct Regs {
28 static constexpr size_t NUM_REGS = 0x258; 30 static constexpr size_t NUM_REGS = 0x258;
29 31
32 struct Surface {
33 RenderTargetFormat format;
34 BitField<0, 1, u32> linear;
35 union {
36 BitField<0, 4, u32> block_depth;
37 BitField<4, 4, u32> block_height;
38 BitField<8, 4, u32> block_width;
39 };
40 u32 depth;
41 u32 layer;
42 u32 pitch;
43 u32 width;
44 u32 height;
45 u32 address_high;
46 u32 address_low;
47
48 GPUVAddr Address() const {
49 return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
50 address_low);
51 }
52 };
53 static_assert(sizeof(Surface) == 0x28, "Surface has incorrect size");
54
55 enum class Operation : u32 {
56 SrcCopyAnd = 0,
57 ROPAnd = 1,
58 Blend = 2,
59 SrcCopy = 3,
60 ROP = 4,
61 SrcCopyPremult = 5,
62 BlendPremult = 6,
63 };
64
30 union { 65 union {
31 struct { 66 struct {
32 INSERT_PADDING_WORDS(0x258); 67 INSERT_PADDING_WORDS(0x80);
68
69 Surface dst;
70
71 INSERT_PADDING_WORDS(2);
72
73 Surface src;
74
75 INSERT_PADDING_WORDS(0x15);
76
77 Operation operation;
78
79 INSERT_PADDING_WORDS(0x9);
80
81 // TODO(Subv): This is only a guess.
82 u32 trigger;
83
84 INSERT_PADDING_WORDS(0x1A3);
33 }; 85 };
34 std::array<u32, NUM_REGS> reg_array; 86 std::array<u32, NUM_REGS> reg_array;
35 }; 87 };
@@ -42,6 +94,10 @@ public:
42 static_assert(offsetof(Fermi2D::Regs, field_name) == position * 4, \ 94 static_assert(offsetof(Fermi2D::Regs, field_name) == position * 4, \
43 "Field " #field_name " has invalid position") 95 "Field " #field_name " has invalid position")
44 96
97ASSERT_REG_POSITION(dst, 0x80);
98ASSERT_REG_POSITION(src, 0x8C);
99ASSERT_REG_POSITION(operation, 0xAB);
100ASSERT_REG_POSITION(trigger, 0xB5);
45#undef ASSERT_REG_POSITION 101#undef ASSERT_REG_POSITION
46 102
47} // namespace Engines 103} // namespace Engines