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authorGravatar Fernando Sahmkow2020-05-02 22:03:09 -0400
committerGravatar Fernando Sahmkow2020-06-27 11:36:13 -0400
commit3714f2e471e06856499432761981760c557d2d90 (patch)
tree259907e6598cdb53661124ba5a4fbfe6797ff2d6 /src
parentARMInterface: Correct rebase errors. (diff)
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ARMInterface/Externals: Update dynarmic and fit to latest version.
Diffstat (limited to 'src')
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic_64.cpp14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
index 226fd4915..8095901d1 100644
--- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp
@@ -195,7 +195,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable&
195 config.enable_fast_dispatch = false; 195 config.enable_fast_dispatch = false;
196 } 196 }
197 197
198 // CNTPCT uses wall clock. 198 // Timing
199 config.wall_clock_cntpct = uses_wall_clock; 199 config.wall_clock_cntpct = uses_wall_clock;
200 200
201 return std::make_shared<Dynarmic::A64::Jit>(config); 201 return std::make_shared<Dynarmic::A64::Jit>(config);
@@ -271,7 +271,7 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
271} 271}
272 272
273void ARM_Dynarmic_64::ChangeProcessorId(std::size_t new_core_id) { 273void ARM_Dynarmic_64::ChangeProcessorId(std::size_t new_core_id) {
274 jit->ChangeProcessorId(new_core_id); 274 jit->ChangeProcessorID(new_core_id);
275} 275}
276 276
277void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) { 277void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) {
@@ -358,31 +358,31 @@ void DynarmicExclusiveMonitor::ClearExclusive() {
358} 358}
359 359
360bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) { 360bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) {
361 return monitor.DoExclusiveOperation<u8>(core_index, vaddr, 1, [&](u8 expected) -> bool { 361 return monitor.DoExclusiveOperation<u8>(core_index, vaddr, [&](u8 expected) -> bool {
362 return memory.WriteExclusive8(vaddr, value, expected); 362 return memory.WriteExclusive8(vaddr, value, expected);
363 }); 363 });
364} 364}
365 365
366bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) { 366bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) {
367 return monitor.DoExclusiveOperation<u16>(core_index, vaddr, 2, [&](u16 expected) -> bool { 367 return monitor.DoExclusiveOperation<u16>(core_index, vaddr, [&](u16 expected) -> bool {
368 return memory.WriteExclusive16(vaddr, value, expected); 368 return memory.WriteExclusive16(vaddr, value, expected);
369 }); 369 });
370} 370}
371 371
372bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) { 372bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) {
373 return monitor.DoExclusiveOperation<u32>(core_index, vaddr, 4, [&](u32 expected) -> bool { 373 return monitor.DoExclusiveOperation<u32>(core_index, vaddr, [&](u32 expected) -> bool {
374 return memory.WriteExclusive32(vaddr, value, expected); 374 return memory.WriteExclusive32(vaddr, value, expected);
375 }); 375 });
376} 376}
377 377
378bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) { 378bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) {
379 return monitor.DoExclusiveOperation<u64>(core_index, vaddr, 8, [&](u64 expected) -> bool { 379 return monitor.DoExclusiveOperation<u64>(core_index, vaddr, [&](u64 expected) -> bool {
380 return memory.WriteExclusive64(vaddr, value, expected); 380 return memory.WriteExclusive64(vaddr, value, expected);
381 }); 381 });
382} 382}
383 383
384bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) { 384bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) {
385 return monitor.DoExclusiveOperation<u128>(core_index, vaddr, 16, [&](u128 expected) -> bool { 385 return monitor.DoExclusiveOperation<u128>(core_index, vaddr, [&](u128 expected) -> bool {
386 return memory.WriteExclusive128(vaddr, value, expected); 386 return memory.WriteExclusive128(vaddr, value, expected);
387 }); 387 });
388} 388}