summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorGravatar Emmanuel Gil Peyrot2015-04-14 21:34:36 +0200
committerGravatar Emmanuel Gil Peyrot2015-04-14 21:34:36 +0200
commit2e860bd59c914e75cda118a2e4249d20d0d3c394 (patch)
tree803f60fa0ed6e8c244f3e0b4eef30b37a61f8e2f /src
parentcitra-qt: Use std::abs() to get the right absolute function for s64. (diff)
downloadyuzu-2e860bd59c914e75cda118a2e4249d20d0d3c394.tar.gz
yuzu-2e860bd59c914e75cda118a2e4249d20d0d3c394.tar.xz
yuzu-2e860bd59c914e75cda118a2e4249d20d0d3c394.zip
Core_ARM11: Replace debug prints with our own logging functions in vfpsingle.
Diffstat (limited to 'src')
-rw-r--r--src/core/arm/skyeye_common/vfp/vfp_helper.h3
-rw-r--r--src/core/arm/skyeye_common/vfp/vfpsingle.cpp72
2 files changed, 36 insertions, 39 deletions
diff --git a/src/core/arm/skyeye_common/vfp/vfp_helper.h b/src/core/arm/skyeye_common/vfp/vfp_helper.h
index 5d1b4e53f..6b3dae280 100644
--- a/src/core/arm/skyeye_common/vfp/vfp_helper.h
+++ b/src/core/arm/skyeye_common/vfp/vfp_helper.h
@@ -36,9 +36,6 @@
36#include "common/common_types.h" 36#include "common/common_types.h"
37#include "core/arm/skyeye_common/armdefs.h" 37#include "core/arm/skyeye_common/armdefs.h"
38 38
39#define pr_info //printf
40#define pr_debug //printf
41
42#define do_div(n, base) {n/=base;} 39#define do_div(n, base) {n/=base;}
43 40
44enum : u32 { 41enum : u32 {
diff --git a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp
index 8b2dfa388..a78bdc430 100644
--- a/src/core/arm/skyeye_common/vfp/vfpsingle.cpp
+++ b/src/core/arm/skyeye_common/vfp/vfpsingle.cpp
@@ -51,6 +51,8 @@
51 * =========================================================================== 51 * ===========================================================================
52 */ 52 */
53 53
54#include "common/logging/log.h"
55
54#include "core/arm/skyeye_common/vfp/vfp_helper.h" 56#include "core/arm/skyeye_common/vfp/vfp_helper.h"
55#include "core/arm/skyeye_common/vfp/asm_vfp.h" 57#include "core/arm/skyeye_common/vfp/asm_vfp.h"
56#include "core/arm/skyeye_common/vfp/vfp.h" 58#include "core/arm/skyeye_common/vfp/vfp.h"
@@ -63,8 +65,8 @@ static struct vfp_single vfp_single_default_qnan = {
63 65
64static void vfp_single_dump(const char *str, struct vfp_single *s) 66static void vfp_single_dump(const char *str, struct vfp_single *s)
65{ 67{
66 pr_debug("VFP: %s: sign=%d exponent=%d significand=%08x\n", 68 LOG_DEBUG(Core_ARM11, "%s: sign=%d exponent=%d significand=%08x",
67 str, s->sign != 0, s->exponent, s->significand); 69 str, s->sign != 0, s->exponent, s->significand);
68} 70}
69 71
70static void vfp_single_normalise_denormal(struct vfp_single *vs) 72static void vfp_single_normalise_denormal(struct vfp_single *vs)
@@ -154,7 +156,7 @@ u32 vfp_single_normaliseround(ARMul_State* state, int sd, struct vfp_single *vs,
154 } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0)) 156 } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0))
155 incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1; 157 incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1;
156 158
157 pr_debug("VFP: rounding increment = 0x%08x\n", incr); 159 LOG_DEBUG(Core_ARM11, "rounding increment = 0x%08x", incr);
158 160
159 /* 161 /*
160 * Is our rounding going to overflow? 162 * Is our rounding going to overflow?
@@ -209,10 +211,8 @@ pack:
209 vfp_single_dump("pack: final", vs); 211 vfp_single_dump("pack: final", vs);
210 { 212 {
211 s32 d = vfp_single_pack(vs); 213 s32 d = vfp_single_pack(vs);
212#if 1 214 LOG_DEBUG(Core_ARM11, "%s: d(s%d)=%08x exceptions=%08x", func,
213 pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func, 215 sd, d, exceptions);
214 sd, d, exceptions);
215#endif
216 vfp_put_float(state, d, sd); 216 vfp_put_float(state, d, sd);
217 } 217 }
218 218
@@ -302,7 +302,7 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand)
302 u32 z, a; 302 u32 z, a;
303 303
304 if ((significand & 0xc0000000) != 0x40000000) { 304 if ((significand & 0xc0000000) != 0x40000000) {
305 pr_debug("VFP: estimate_sqrt: invalid significand\n"); 305 LOG_DEBUG(Core_ARM11, "invalid significand");
306 } 306 }
307 307
308 a = significand << 1; 308 a = significand << 1;
@@ -392,7 +392,7 @@ sqrt_invalid:
392 term = (u64)vsd.significand * vsd.significand; 392 term = (u64)vsd.significand * vsd.significand;
393 rem = ((u64)vsm.significand << 32) - term; 393 rem = ((u64)vsm.significand << 32) - term;
394 394
395 pr_debug("VFP: term=%016llx rem=%016llx\n", term, rem); 395 LOG_DEBUG(Core_ARM11, "term=%016lx rem=%016lx", term, rem);
396 396
397 while (rem < 0) { 397 while (rem < 0) {
398 vsd.significand -= 1; 398 vsd.significand -= 1;
@@ -624,7 +624,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
624 } 624 }
625 } 625 }
626 626
627 pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); 627 LOG_DEBUG(Core_ARM11, "ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
628 628
629 vfp_put_float(state, d, sd); 629 vfp_put_float(state, d, sd);
630 630
@@ -703,7 +703,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
703 } 703 }
704 } 704 }
705 705
706 pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); 706 LOG_DEBUG(Core_ARM11, "ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
707 707
708 vfp_put_float(state, (s32)d, sd); 708 vfp_put_float(state, (s32)d, sd);
709 709
@@ -800,7 +800,7 @@ vfp_single_add(struct vfp_single *vsd, struct vfp_single *vsn,
800 800
801 if (vsn->significand & 0x80000000 || 801 if (vsn->significand & 0x80000000 ||
802 vsm->significand & 0x80000000) { 802 vsm->significand & 0x80000000) {
803 pr_info("VFP: bad FP values in %s\n", __func__); 803 LOG_WARNING(Core_ARM11, "bad FP values");
804 vfp_single_dump("VSN", vsn); 804 vfp_single_dump("VSN", vsn);
805 vfp_single_dump("VSM", vsm); 805 vfp_single_dump("VSM", vsm);
806 } 806 }
@@ -871,7 +871,7 @@ vfp_single_multiply(struct vfp_single *vsd, struct vfp_single *vsn, struct vfp_s
871 struct vfp_single *t = vsn; 871 struct vfp_single *t = vsn;
872 vsn = vsm; 872 vsn = vsm;
873 vsm = t; 873 vsm = t;
874 pr_debug("VFP: swapping M <-> N\n"); 874 LOG_DEBUG(Core_ARM11, "swapping M <-> N");
875 } 875 }
876 876
877 vsd->sign = vsn->sign ^ vsm->sign; 877 vsd->sign = vsn->sign ^ vsm->sign;
@@ -924,7 +924,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp
924 s32 v; 924 s32 v;
925 925
926 v = vfp_get_float(state, sn); 926 v = vfp_get_float(state, sn);
927 pr_debug("VFP: s%u = %08x\n", sn, v); 927 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, v);
928 vfp_single_unpack(&vsn, v); 928 vfp_single_unpack(&vsn, v);
929 if (vsn.exponent == 0 && vsn.significand) 929 if (vsn.exponent == 0 && vsn.significand)
930 vfp_single_normalise_denormal(&vsn); 930 vfp_single_normalise_denormal(&vsn);
@@ -939,7 +939,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp
939 vsp.sign = vfp_sign_negate(vsp.sign); 939 vsp.sign = vfp_sign_negate(vsp.sign);
940 940
941 v = vfp_get_float(state, sd); 941 v = vfp_get_float(state, sd);
942 pr_debug("VFP: s%u = %08x\n", sd, v); 942 LOG_DEBUG(Core_ARM11, "s%u = %08x", sd, v);
943 vfp_single_unpack(&vsn, v); 943 vfp_single_unpack(&vsn, v);
944 if (vsn.exponent == 0 && vsn.significand != 0) 944 if (vsn.exponent == 0 && vsn.significand != 0)
945 vfp_single_normalise_denormal(&vsn); 945 vfp_single_normalise_denormal(&vsn);
@@ -961,7 +961,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp
961 */ 961 */
962static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) 962static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
963{ 963{
964 pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); 964 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
965 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac"); 965 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac");
966} 966}
967 967
@@ -970,7 +970,8 @@ static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
970 */ 970 */
971static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) 971static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
972{ 972{
973 pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sd, sn); 973 // TODO: this one has its arguments inverted, investigate.
974 LOG_DEBUG(Core_ARM11, "s%u = %08x", sd, sn);
974 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac"); 975 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac");
975} 976}
976 977
@@ -979,7 +980,7 @@ static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
979 */ 980 */
980static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) 981static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
981{ 982{
982 pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); 983 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
983 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc"); 984 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc");
984} 985}
985 986
@@ -988,7 +989,7 @@ static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
988 */ 989 */
989static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) 990static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
990{ 991{
991 pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); 992 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
992 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc"); 993 return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc");
993} 994}
994 995
@@ -1001,7 +1002,7 @@ static u32 vfp_single_fmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
1001 u32 exceptions; 1002 u32 exceptions;
1002 s32 n = vfp_get_float(state, sn); 1003 s32 n = vfp_get_float(state, sn);
1003 1004
1004 pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, n); 1005 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
1005 1006
1006 vfp_single_unpack(&vsn, n); 1007 vfp_single_unpack(&vsn, n);
1007 if (vsn.exponent == 0 && vsn.significand) 1008 if (vsn.exponent == 0 && vsn.significand)
@@ -1024,7 +1025,7 @@ static u32 vfp_single_fnmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
1024 u32 exceptions; 1025 u32 exceptions;
1025 s32 n = vfp_get_float(state, sn); 1026 s32 n = vfp_get_float(state, sn);
1026 1027
1027 pr_debug("VFP: s%u = %08x\n", sn, n); 1028 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
1028 1029
1029 vfp_single_unpack(&vsn, n); 1030 vfp_single_unpack(&vsn, n);
1030 if (vsn.exponent == 0 && vsn.significand) 1031 if (vsn.exponent == 0 && vsn.significand)
@@ -1048,7 +1049,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
1048 u32 exceptions; 1049 u32 exceptions;
1049 s32 n = vfp_get_float(state, sn); 1050 s32 n = vfp_get_float(state, sn);
1050 1051
1051 pr_debug("VFP: s%u = %08x\n", sn, n); 1052 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
1052 1053
1053 /* 1054 /*
1054 * Unpack and normalise denormals. 1055 * Unpack and normalise denormals.
@@ -1071,7 +1072,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
1071 */ 1072 */
1072static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) 1073static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
1073{ 1074{
1074 pr_debug("In %sVFP: s%u = %08x\n", __FUNCTION__, sn, sd); 1075 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
1075 /* 1076 /*
1076 * Subtraction is addition with one sign inverted. 1077 * Subtraction is addition with one sign inverted.
1077 */ 1078 */
@@ -1091,7 +1092,7 @@ static u32 vfp_single_fdiv(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
1091 s32 n = vfp_get_float(state, sn); 1092 s32 n = vfp_get_float(state, sn);
1092 int tm, tn; 1093 int tm, tn;
1093 1094
1094 pr_debug("VFP: s%u = %08x\n", sn, n); 1095 LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
1095 1096
1096 vfp_single_unpack(&vsn, n); 1097 vfp_single_unpack(&vsn, n);
1097 vfp_single_unpack(&vsm, m); 1098 vfp_single_unpack(&vsm, m);
@@ -1213,7 +1214,6 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
1213 unsigned int sm = vfp_get_sm(inst); 1214 unsigned int sm = vfp_get_sm(inst);
1214 unsigned int vecitr, veclen, vecstride; 1215 unsigned int vecitr, veclen, vecstride;
1215 struct op *fop; 1216 struct op *fop;
1216 pr_debug("In %s\n", __FUNCTION__);
1217 1217
1218 vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); 1218 vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK);
1219 1219
@@ -1239,11 +1239,11 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
1239 else 1239 else
1240 veclen = fpscr & FPSCR_LENGTH_MASK; 1240 veclen = fpscr & FPSCR_LENGTH_MASK;
1241 1241
1242 pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, 1242 LOG_DEBUG(Core_ARM11, "vecstride=%u veclen=%u", vecstride,
1243 (veclen >> FPSCR_LENGTH_BIT) + 1); 1243 (veclen >> FPSCR_LENGTH_BIT) + 1);
1244 1244
1245 if (!fop->fn) { 1245 if (!fop->fn) {
1246 printf("VFP: could not find single op %d, inst=0x%x@0x%x\n", FEXT_TO_IDX(inst), inst, state->Reg[15]); 1246 LOG_CRITICAL(Core_ARM11, "could not find single op %d, inst=0x%x@0x%x", FEXT_TO_IDX(inst), inst, state->Reg[15]);
1247 exit(-1); 1247 exit(-1);
1248 goto invalid; 1248 goto invalid;
1249 } 1249 }
@@ -1255,17 +1255,17 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
1255 1255
1256 type = (fop->flags & OP_DD) ? 'd' : 's'; 1256 type = (fop->flags & OP_DD) ? 'd' : 's';
1257 if (op == FOP_EXT) 1257 if (op == FOP_EXT)
1258 pr_debug("VFP: itr%d (%c%u) = op[%u] (s%u=%08x)\n", 1258 LOG_DEBUG(Core_ARM11, "itr%d (%c%u) = op[%u] (s%u=%08x)",
1259 vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, 1259 vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,
1260 sm, m); 1260 sm, m);
1261 else 1261 else
1262 pr_debug("VFP: itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)\n", 1262 LOG_DEBUG(Core_ARM11, "itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)",
1263 vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, 1263 vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,
1264 FOP_TO_IDX(op), sm, m); 1264 FOP_TO_IDX(op), sm, m);
1265 1265
1266 except = fop->fn(state, dest, sn, m, fpscr); 1266 except = fop->fn(state, dest, sn, m, fpscr);
1267 pr_debug("VFP: itr%d: exceptions=%08x\n", 1267 LOG_DEBUG(Core_ARM11, "itr%d: exceptions=%08x",
1268 vecitr >> FPSCR_LENGTH_BIT, except); 1268 vecitr >> FPSCR_LENGTH_BIT, except);
1269 1269
1270 exceptions |= except; 1270 exceptions |= except;
1271 1271