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authorGravatar ReinUsesLisp2019-04-01 23:03:32 -0300
committerGravatar ReinUsesLisp2019-04-03 17:12:44 -0300
commit24abeb9a67a45ba9c1d67163b7b75cac8aa3d03e (patch)
tree2d9837feabbdae61a71f69d63fb9b7d8cacff183 /src
parentMerge pull request #2294 from lioncash/fatal (diff)
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shader_ir/memory: Reduce severity of ST_L cache management and log it
Diffstat (limited to 'src')
-rw-r--r--src/video_core/engines/shader_bytecode.h9
-rw-r--r--src/video_core/shader/decode/memory.cpp5
2 files changed, 11 insertions, 3 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index 7f613370b..55d32ace6 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -387,6 +387,13 @@ enum class IpaSampleMode : u64 {
387 Offset = 2, 387 Offset = 2,
388}; 388};
389 389
390enum class LmemStoreCacheManagement : u64 {
391 Default = 0,
392 CG = 1,
393 CS = 2,
394 WT = 3,
395};
396
390struct IpaMode { 397struct IpaMode {
391 IpaInterpMode interpolation_mode; 398 IpaInterpMode interpolation_mode;
392 IpaSampleMode sampling_mode; 399 IpaSampleMode sampling_mode;
@@ -782,7 +789,7 @@ union Instruction {
782 } ld_l; 789 } ld_l;
783 790
784 union { 791 union {
785 BitField<44, 2, u64> unknown; 792 BitField<44, 2, LmemStoreCacheManagement> cache_management;
786 } st_l; 793 } st_l;
787 794
788 union { 795 union {
diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp
index ea3c71eed..a272c6233 100644
--- a/src/video_core/shader/decode/memory.cpp
+++ b/src/video_core/shader/decode/memory.cpp
@@ -8,6 +8,7 @@
8 8
9#include "common/assert.h" 9#include "common/assert.h"
10#include "common/common_types.h" 10#include "common/common_types.h"
11#include "common/logging/log.h"
11#include "video_core/engines/shader_bytecode.h" 12#include "video_core/engines/shader_bytecode.h"
12#include "video_core/shader/shader_ir.h" 13#include "video_core/shader/shader_ir.h"
13 14
@@ -205,8 +206,8 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
205 break; 206 break;
206 } 207 }
207 case OpCode::Id::ST_L: { 208 case OpCode::Id::ST_L: {
208 UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}", 209 LOG_DEBUG(HW_GPU, "ST_L cache management mode: {}",
209 static_cast<u32>(instr.st_l.unknown.Value())); 210 static_cast<u64>(instr.st_l.cache_management.Value()));
210 211
211 const auto GetLmemAddr = [&](s32 offset) { 212 const auto GetLmemAddr = [&](s32 offset) {
212 ASSERT(offset % 4 == 0); 213 ASSERT(offset % 4 == 0);