diff options
| author | 2022-10-11 17:22:40 -0400 | |
|---|---|---|
| committer | 2022-10-11 17:22:40 -0400 | |
| commit | 133a68ee9b420d30a58fe7ddd8c03065324a4d70 (patch) | |
| tree | e2a8f89c372b545c6cabbcc53a9d725a6fe2cdb1 /src | |
| parent | Merge pull request #9044 from lat9nq/mingw-gcc-revert (diff) | |
| parent | Fix stencil func registers, make clip control equivalent to how it was before... (diff) | |
| download | yuzu-133a68ee9b420d30a58fe7ddd8c03065324a4d70.tar.gz yuzu-133a68ee9b420d30a58fe7ddd8c03065324a4d70.tar.xz yuzu-133a68ee9b420d30a58fe7ddd8c03065324a4d70.zip | |
Merge pull request #9048 from Kelebek1/regs
[video_core] Fix stencil mask registers
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/dirty_flags.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 8 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 22 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer.cpp | 17 | ||||
| -rw-r--r-- | src/video_core/renderer_opengl/gl_state_tracker.cpp | 14 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/fixed_pipeline_state.cpp | 6 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/vk_rasterizer.cpp | 14 | ||||
| -rw-r--r-- | src/video_core/renderer_vulkan/vk_state_tracker.cpp | 12 |
8 files changed, 51 insertions, 44 deletions
diff --git a/src/video_core/dirty_flags.cpp b/src/video_core/dirty_flags.cpp index 1039e036f..c2ecc12f5 100644 --- a/src/video_core/dirty_flags.cpp +++ b/src/video_core/dirty_flags.cpp | |||
| @@ -61,7 +61,7 @@ void SetupDirtyRenderTargets(Maxwell3D::DirtyState::Tables& tables) { | |||
| 61 | } | 61 | } |
| 62 | 62 | ||
| 63 | void SetupDirtyShaders(Maxwell3D::DirtyState::Tables& tables) { | 63 | void SetupDirtyShaders(Maxwell3D::DirtyState::Tables& tables) { |
| 64 | FillBlock(tables[0], OFF(pipelines), NUM(pipelines) * Maxwell3D::Regs::MaxShaderProgram, | 64 | FillBlock(tables[0], OFF(pipelines), NUM(pipelines[0]) * Maxwell3D::Regs::MaxShaderProgram, |
| 65 | Shaders); | 65 | Shaders); |
| 66 | } | 66 | } |
| 67 | } // Anonymous namespace | 67 | } // Anonymous namespace |
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 84c1abf3d..89a9d1f5a 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp | |||
| @@ -74,15 +74,15 @@ void Maxwell3D::InitializeRegisterDefaults() { | |||
| 74 | regs.stencil_front_op.zfail = Regs::StencilOp::Op::Keep_D3D; | 74 | regs.stencil_front_op.zfail = Regs::StencilOp::Op::Keep_D3D; |
| 75 | regs.stencil_front_op.zpass = Regs::StencilOp::Op::Keep_D3D; | 75 | regs.stencil_front_op.zpass = Regs::StencilOp::Op::Keep_D3D; |
| 76 | regs.stencil_front_op.func = Regs::ComparisonOp::Always_GL; | 76 | regs.stencil_front_op.func = Regs::ComparisonOp::Always_GL; |
| 77 | regs.stencil_front_func.func_mask = 0xFFFFFFFF; | 77 | regs.stencil_front_func_mask = 0xFFFFFFFF; |
| 78 | regs.stencil_front_func.mask = 0xFFFFFFFF; | 78 | regs.stencil_front_mask = 0xFFFFFFFF; |
| 79 | regs.stencil_two_side_enable = 1; | 79 | regs.stencil_two_side_enable = 1; |
| 80 | regs.stencil_back_op.fail = Regs::StencilOp::Op::Keep_D3D; | 80 | regs.stencil_back_op.fail = Regs::StencilOp::Op::Keep_D3D; |
| 81 | regs.stencil_back_op.zfail = Regs::StencilOp::Op::Keep_D3D; | 81 | regs.stencil_back_op.zfail = Regs::StencilOp::Op::Keep_D3D; |
| 82 | regs.stencil_back_op.zpass = Regs::StencilOp::Op::Keep_D3D; | 82 | regs.stencil_back_op.zpass = Regs::StencilOp::Op::Keep_D3D; |
| 83 | regs.stencil_back_op.func = Regs::ComparisonOp::Always_GL; | 83 | regs.stencil_back_op.func = Regs::ComparisonOp::Always_GL; |
| 84 | regs.stencil_back_func.func_mask = 0xFFFFFFFF; | 84 | regs.stencil_back_func_mask = 0xFFFFFFFF; |
| 85 | regs.stencil_back_func.mask = 0xFFFFFFFF; | 85 | regs.stencil_back_mask = 0xFFFFFFFF; |
| 86 | 86 | ||
| 87 | regs.depth_test_func = Regs::ComparisonOp::Always_GL; | 87 | regs.depth_test_func = Regs::ComparisonOp::Always_GL; |
| 88 | regs.gl_front_face = Regs::FrontFace::CounterClockWise; | 88 | regs.gl_front_face = Regs::FrontFace::CounterClockWise; |
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index efe1073b0..12dbd9cc4 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -1795,12 +1795,6 @@ public: | |||
| 1795 | ComparisonOp func; | 1795 | ComparisonOp func; |
| 1796 | }; | 1796 | }; |
| 1797 | 1797 | ||
| 1798 | struct StencilFunc { | ||
| 1799 | s32 ref; | ||
| 1800 | u32 func_mask; | ||
| 1801 | u32 mask; | ||
| 1802 | }; | ||
| 1803 | |||
| 1804 | struct PsSaturate { | 1798 | struct PsSaturate { |
| 1805 | // Opposite of DepthMode | 1799 | // Opposite of DepthMode |
| 1806 | enum class Depth : u32 { | 1800 | enum class Depth : u32 { |
| @@ -2737,7 +2731,9 @@ public: | |||
| 2737 | u32 post_z_pixel_imask; ///< 0x0F1C | 2731 | u32 post_z_pixel_imask; ///< 0x0F1C |
| 2738 | INSERT_PADDING_BYTES_NOINIT(0x20); | 2732 | INSERT_PADDING_BYTES_NOINIT(0x20); |
| 2739 | ConstantColorRendering const_color_rendering; ///< 0x0F40 | 2733 | ConstantColorRendering const_color_rendering; ///< 0x0F40 |
| 2740 | StencilFunc stencil_back_func; ///< 0x0F54 | 2734 | s32 stencil_back_ref; ///< 0x0F54 |
| 2735 | u32 stencil_back_mask; ///< 0x0F58 | ||
| 2736 | u32 stencil_back_func_mask; ///< 0x0F5C | ||
| 2741 | INSERT_PADDING_BYTES_NOINIT(0x24); | 2737 | INSERT_PADDING_BYTES_NOINIT(0x24); |
| 2742 | VertexStreamSubstitute vertex_stream_substitute; ///< 0x0F84 | 2738 | VertexStreamSubstitute vertex_stream_substitute; ///< 0x0F84 |
| 2743 | u32 line_mode_clip_generated_edge_do_not_draw; ///< 0x0F8C | 2739 | u32 line_mode_clip_generated_edge_do_not_draw; ///< 0x0F8C |
| @@ -2855,7 +2851,9 @@ public: | |||
| 2855 | Blend blend; ///< 0x133C | 2851 | Blend blend; ///< 0x133C |
| 2856 | u32 stencil_enable; ///< 0x1380 | 2852 | u32 stencil_enable; ///< 0x1380 |
| 2857 | StencilOp stencil_front_op; ///< 0x1384 | 2853 | StencilOp stencil_front_op; ///< 0x1384 |
| 2858 | StencilFunc stencil_front_func; ///< 0x1394 | 2854 | s32 stencil_front_ref; ///< 0x1394 |
| 2855 | s32 stencil_front_func_mask; ///< 0x1398 | ||
| 2856 | s32 stencil_front_mask; ///< 0x139C | ||
| 2859 | INSERT_PADDING_BYTES_NOINIT(0x4); | 2857 | INSERT_PADDING_BYTES_NOINIT(0x4); |
| 2860 | u32 draw_auto_start_byte_count; ///< 0x13A4 | 2858 | u32 draw_auto_start_byte_count; ///< 0x13A4 |
| 2861 | PsSaturate frag_color_clamp; ///< 0x13A8 | 2859 | PsSaturate frag_color_clamp; ///< 0x13A8 |
| @@ -3311,7 +3309,9 @@ ASSERT_REG_POSITION(vpc_perf, 0x0F14); | |||
| 3311 | ASSERT_REG_POSITION(pm_local_trigger, 0x0F18); | 3309 | ASSERT_REG_POSITION(pm_local_trigger, 0x0F18); |
| 3312 | ASSERT_REG_POSITION(post_z_pixel_imask, 0x0F1C); | 3310 | ASSERT_REG_POSITION(post_z_pixel_imask, 0x0F1C); |
| 3313 | ASSERT_REG_POSITION(const_color_rendering, 0x0F40); | 3311 | ASSERT_REG_POSITION(const_color_rendering, 0x0F40); |
| 3314 | ASSERT_REG_POSITION(stencil_back_func, 0x0F54); | 3312 | ASSERT_REG_POSITION(stencil_back_ref, 0x0F54); |
| 3313 | ASSERT_REG_POSITION(stencil_back_mask, 0x0F58); | ||
| 3314 | ASSERT_REG_POSITION(stencil_back_func_mask, 0x0F5C); | ||
| 3315 | ASSERT_REG_POSITION(vertex_stream_substitute, 0x0F84); | 3315 | ASSERT_REG_POSITION(vertex_stream_substitute, 0x0F84); |
| 3316 | ASSERT_REG_POSITION(line_mode_clip_generated_edge_do_not_draw, 0x0F8C); | 3316 | ASSERT_REG_POSITION(line_mode_clip_generated_edge_do_not_draw, 0x0F8C); |
| 3317 | ASSERT_REG_POSITION(color_mask_common, 0x0F90); | 3317 | ASSERT_REG_POSITION(color_mask_common, 0x0F90); |
| @@ -3416,7 +3416,9 @@ ASSERT_REG_POSITION(invalidate_texture_data_cache_lines, 0x1338); | |||
| 3416 | ASSERT_REG_POSITION(blend, 0x133C); | 3416 | ASSERT_REG_POSITION(blend, 0x133C); |
| 3417 | ASSERT_REG_POSITION(stencil_enable, 0x1380); | 3417 | ASSERT_REG_POSITION(stencil_enable, 0x1380); |
| 3418 | ASSERT_REG_POSITION(stencil_front_op, 0x1384); | 3418 | ASSERT_REG_POSITION(stencil_front_op, 0x1384); |
| 3419 | ASSERT_REG_POSITION(stencil_front_func, 0x1394); | 3419 | ASSERT_REG_POSITION(stencil_front_ref, 0x1394); |
| 3420 | ASSERT_REG_POSITION(stencil_front_func_mask, 0x1398); | ||
| 3421 | ASSERT_REG_POSITION(stencil_front_mask, 0x139C); | ||
| 3420 | ASSERT_REG_POSITION(draw_auto_start_byte_count, 0x13A4); | 3422 | ASSERT_REG_POSITION(draw_auto_start_byte_count, 0x13A4); |
| 3421 | ASSERT_REG_POSITION(frag_color_clamp, 0x13A8); | 3423 | ASSERT_REG_POSITION(frag_color_clamp, 0x13A8); |
| 3422 | ASSERT_REG_POSITION(window_origin, 0x13AC); | 3424 | ASSERT_REG_POSITION(window_origin, 0x13AC); |
diff --git a/src/video_core/renderer_opengl/gl_rasterizer.cpp b/src/video_core/renderer_opengl/gl_rasterizer.cpp index cce00cea8..e5c09a969 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer.cpp +++ b/src/video_core/renderer_opengl/gl_rasterizer.cpp | |||
| @@ -658,8 +658,13 @@ void RasterizerOpenGL::SyncDepthClamp() { | |||
| 658 | } | 658 | } |
| 659 | flags[Dirty::DepthClampEnabled] = false; | 659 | flags[Dirty::DepthClampEnabled] = false; |
| 660 | 660 | ||
| 661 | oglEnable(GL_DEPTH_CLAMP, maxwell3d->regs.viewport_clip_control.geometry_clip != | 661 | bool depth_clamp_disabled{maxwell3d->regs.viewport_clip_control.geometry_clip == |
| 662 | Maxwell::ViewportClipControl::GeometryClip::Passthrough); | 662 | Maxwell::ViewportClipControl::GeometryClip::Passthrough || |
| 663 | maxwell3d->regs.viewport_clip_control.geometry_clip == | ||
| 664 | Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ || | ||
| 665 | maxwell3d->regs.viewport_clip_control.geometry_clip == | ||
| 666 | Maxwell::ViewportClipControl::GeometryClip::FrustumZ}; | ||
| 667 | oglEnable(GL_DEPTH_CLAMP, !depth_clamp_disabled); | ||
| 663 | } | 668 | } |
| 664 | 669 | ||
| 665 | void RasterizerOpenGL::SyncClipEnabled(u32 clip_mask) { | 670 | void RasterizerOpenGL::SyncClipEnabled(u32 clip_mask) { |
| @@ -746,19 +751,19 @@ void RasterizerOpenGL::SyncStencilTestState() { | |||
| 746 | oglEnable(GL_STENCIL_TEST, regs.stencil_enable); | 751 | oglEnable(GL_STENCIL_TEST, regs.stencil_enable); |
| 747 | 752 | ||
| 748 | glStencilFuncSeparate(GL_FRONT, MaxwellToGL::ComparisonOp(regs.stencil_front_op.func), | 753 | glStencilFuncSeparate(GL_FRONT, MaxwellToGL::ComparisonOp(regs.stencil_front_op.func), |
| 749 | regs.stencil_front_func.ref, regs.stencil_front_func.func_mask); | 754 | regs.stencil_front_ref, regs.stencil_front_func_mask); |
| 750 | glStencilOpSeparate(GL_FRONT, MaxwellToGL::StencilOp(regs.stencil_front_op.fail), | 755 | glStencilOpSeparate(GL_FRONT, MaxwellToGL::StencilOp(regs.stencil_front_op.fail), |
| 751 | MaxwellToGL::StencilOp(regs.stencil_front_op.zfail), | 756 | MaxwellToGL::StencilOp(regs.stencil_front_op.zfail), |
| 752 | MaxwellToGL::StencilOp(regs.stencil_front_op.zpass)); | 757 | MaxwellToGL::StencilOp(regs.stencil_front_op.zpass)); |
| 753 | glStencilMaskSeparate(GL_FRONT, regs.stencil_front_func.mask); | 758 | glStencilMaskSeparate(GL_FRONT, regs.stencil_front_mask); |
| 754 | 759 | ||
| 755 | if (regs.stencil_two_side_enable) { | 760 | if (regs.stencil_two_side_enable) { |
| 756 | glStencilFuncSeparate(GL_BACK, MaxwellToGL::ComparisonOp(regs.stencil_back_op.func), | 761 | glStencilFuncSeparate(GL_BACK, MaxwellToGL::ComparisonOp(regs.stencil_back_op.func), |
| 757 | regs.stencil_back_func.ref, regs.stencil_back_func.mask); | 762 | regs.stencil_back_ref, regs.stencil_back_mask); |
| 758 | glStencilOpSeparate(GL_BACK, MaxwellToGL::StencilOp(regs.stencil_back_op.fail), | 763 | glStencilOpSeparate(GL_BACK, MaxwellToGL::StencilOp(regs.stencil_back_op.fail), |
| 759 | MaxwellToGL::StencilOp(regs.stencil_back_op.zfail), | 764 | MaxwellToGL::StencilOp(regs.stencil_back_op.zfail), |
| 760 | MaxwellToGL::StencilOp(regs.stencil_back_op.zpass)); | 765 | MaxwellToGL::StencilOp(regs.stencil_back_op.zpass)); |
| 761 | glStencilMaskSeparate(GL_BACK, regs.stencil_back_func.mask); | 766 | glStencilMaskSeparate(GL_BACK, regs.stencil_back_mask); |
| 762 | } else { | 767 | } else { |
| 763 | glStencilFuncSeparate(GL_BACK, GL_ALWAYS, 0, 0xFFFFFFFF); | 768 | glStencilFuncSeparate(GL_BACK, GL_ALWAYS, 0, 0xFFFFFFFF); |
| 764 | glStencilOpSeparate(GL_BACK, GL_KEEP, GL_KEEP, GL_KEEP); | 769 | glStencilOpSeparate(GL_BACK, GL_KEEP, GL_KEEP, GL_KEEP); |
diff --git a/src/video_core/renderer_opengl/gl_state_tracker.cpp b/src/video_core/renderer_opengl/gl_state_tracker.cpp index e2c709aac..a359f96f1 100644 --- a/src/video_core/renderer_opengl/gl_state_tracker.cpp +++ b/src/video_core/renderer_opengl/gl_state_tracker.cpp | |||
| @@ -100,14 +100,12 @@ void SetupDirtyDepthTest(Tables& tables) { | |||
| 100 | 100 | ||
| 101 | void SetupDirtyStencilTest(Tables& tables) { | 101 | void SetupDirtyStencilTest(Tables& tables) { |
| 102 | static constexpr std::array offsets = { | 102 | static constexpr std::array offsets = { |
| 103 | OFF(stencil_enable), OFF(stencil_front_op.func), | 103 | OFF(stencil_enable), OFF(stencil_front_op.func), OFF(stencil_front_ref), |
| 104 | OFF(stencil_front_func.ref), OFF(stencil_front_func.func_mask), | 104 | OFF(stencil_front_func_mask), OFF(stencil_front_op.fail), OFF(stencil_front_op.zfail), |
| 105 | OFF(stencil_front_op.fail), OFF(stencil_front_op.zfail), | 105 | OFF(stencil_front_op.zpass), OFF(stencil_front_mask), OFF(stencil_two_side_enable), |
| 106 | OFF(stencil_front_op.zpass), OFF(stencil_front_func.mask), | 106 | OFF(stencil_back_op.func), OFF(stencil_back_ref), OFF(stencil_back_func_mask), |
| 107 | OFF(stencil_two_side_enable), OFF(stencil_back_op.func), | 107 | OFF(stencil_back_op.fail), OFF(stencil_back_op.zfail), OFF(stencil_back_op.zpass), |
| 108 | OFF(stencil_back_func.ref), OFF(stencil_back_func.func_mask), | 108 | OFF(stencil_back_mask)}; |
| 109 | OFF(stencil_back_op.fail), OFF(stencil_back_op.zfail), | ||
| 110 | OFF(stencil_back_op.zpass), OFF(stencil_back_func.mask)}; | ||
| 111 | for (const auto offset : offsets) { | 109 | for (const auto offset : offsets) { |
| 112 | tables[0][offset] = StencilTest; | 110 | tables[0][offset] = StencilTest; |
| 113 | } | 111 | } |
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp index eb7c22fd5..eab1b8f93 100644 --- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp +++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp | |||
| @@ -63,7 +63,11 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d, | |||
| 63 | primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0); | 63 | primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0); |
| 64 | depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0); | 64 | depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0); |
| 65 | depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip == | 65 | depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip == |
| 66 | Maxwell::ViewportClipControl::GeometryClip::Passthrough); | 66 | Maxwell::ViewportClipControl::GeometryClip::Passthrough || |
| 67 | regs.viewport_clip_control.geometry_clip == | ||
| 68 | Maxwell::ViewportClipControl::GeometryClip::FrustumXYZ || | ||
| 69 | regs.viewport_clip_control.geometry_clip == | ||
| 70 | Maxwell::ViewportClipControl::GeometryClip::FrustumZ); | ||
| 67 | ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0); | 71 | ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0); |
| 68 | polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front)); | 72 | polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front)); |
| 69 | patch_control_points_minus_one.Assign(regs.patch_vertices - 1); | 73 | patch_control_points_minus_one.Assign(regs.patch_vertices - 1); |
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index 892cd94a3..47dfb45a1 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp | |||
| @@ -772,11 +772,10 @@ void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs) | |||
| 772 | if (regs.stencil_two_side_enable) { | 772 | if (regs.stencil_two_side_enable) { |
| 773 | // Separate values per face | 773 | // Separate values per face |
| 774 | scheduler.Record( | 774 | scheduler.Record( |
| 775 | [front_ref = regs.stencil_front_func.ref, | 775 | [front_ref = regs.stencil_front_ref, front_write_mask = regs.stencil_front_mask, |
| 776 | front_write_mask = regs.stencil_front_func.mask, | 776 | front_test_mask = regs.stencil_front_func_mask, back_ref = regs.stencil_back_ref, |
| 777 | front_test_mask = regs.stencil_front_func.func_mask, | 777 | back_write_mask = regs.stencil_back_mask, |
| 778 | back_ref = regs.stencil_back_func.ref, back_write_mask = regs.stencil_back_func.mask, | 778 | back_test_mask = regs.stencil_back_func_mask](vk::CommandBuffer cmdbuf) { |
| 779 | back_test_mask = regs.stencil_back_func.func_mask](vk::CommandBuffer cmdbuf) { | ||
| 780 | // Front face | 779 | // Front face |
| 781 | cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_BIT, front_ref); | 780 | cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_BIT, front_ref); |
| 782 | cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_BIT, front_write_mask); | 781 | cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_BIT, front_write_mask); |
| @@ -789,9 +788,8 @@ void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs) | |||
| 789 | }); | 788 | }); |
| 790 | } else { | 789 | } else { |
| 791 | // Front face defines both faces | 790 | // Front face defines both faces |
| 792 | scheduler.Record([ref = regs.stencil_front_func.ref, | 791 | scheduler.Record([ref = regs.stencil_front_ref, write_mask = regs.stencil_front_mask, |
| 793 | write_mask = regs.stencil_front_func.mask, | 792 | test_mask = regs.stencil_front_func_mask](vk::CommandBuffer cmdbuf) { |
| 794 | test_mask = regs.stencil_front_func.func_mask](vk::CommandBuffer cmdbuf) { | ||
| 795 | cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_AND_BACK, ref); | 793 | cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_AND_BACK, ref); |
| 796 | cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_AND_BACK, write_mask); | 794 | cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_AND_BACK, write_mask); |
| 797 | cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_FRONT_AND_BACK, test_mask); | 795 | cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_FRONT_AND_BACK, test_mask); |
diff --git a/src/video_core/renderer_vulkan/vk_state_tracker.cpp b/src/video_core/renderer_vulkan/vk_state_tracker.cpp index ed98c8370..b87c3be66 100644 --- a/src/video_core/renderer_vulkan/vk_state_tracker.cpp +++ b/src/video_core/renderer_vulkan/vk_state_tracker.cpp | |||
| @@ -77,12 +77,12 @@ void SetupDirtyDepthBounds(Tables& tables) { | |||
| 77 | void SetupDirtyStencilProperties(Tables& tables) { | 77 | void SetupDirtyStencilProperties(Tables& tables) { |
| 78 | auto& table = tables[0]; | 78 | auto& table = tables[0]; |
| 79 | table[OFF(stencil_two_side_enable)] = StencilProperties; | 79 | table[OFF(stencil_two_side_enable)] = StencilProperties; |
| 80 | table[OFF(stencil_front_func.ref)] = StencilProperties; | 80 | table[OFF(stencil_front_ref)] = StencilProperties; |
| 81 | table[OFF(stencil_front_func.mask)] = StencilProperties; | 81 | table[OFF(stencil_front_mask)] = StencilProperties; |
| 82 | table[OFF(stencil_front_func.func_mask)] = StencilProperties; | 82 | table[OFF(stencil_front_func_mask)] = StencilProperties; |
| 83 | table[OFF(stencil_back_func.ref)] = StencilProperties; | 83 | table[OFF(stencil_back_ref)] = StencilProperties; |
| 84 | table[OFF(stencil_back_func.mask)] = StencilProperties; | 84 | table[OFF(stencil_back_mask)] = StencilProperties; |
| 85 | table[OFF(stencil_back_func.func_mask)] = StencilProperties; | 85 | table[OFF(stencil_back_func_mask)] = StencilProperties; |
| 86 | } | 86 | } |
| 87 | 87 | ||
| 88 | void SetupDirtyLineWidth(Tables& tables) { | 88 | void SetupDirtyLineWidth(Tables& tables) { |