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| author | 2019-04-29 23:28:28 -0300 | |
|---|---|---|
| committer | 2019-05-02 21:46:25 -0300 | |
| commit | 002ecbea190de16294d32449c3d2b61e57490dae (patch) | |
| tree | 323a1f1641e4a9f46c412286750c65470c1de0db /src | |
| parent | shader_bytecode: Add AL2P decoding (diff) | |
| download | yuzu-002ecbea190de16294d32449c3d2b61e57490dae.tar.gz yuzu-002ecbea190de16294d32449c3d2b61e57490dae.tar.xz yuzu-002ecbea190de16294d32449c3d2b61e57490dae.zip | |
shader_ir/memory: Emit AL2P IR
Diffstat (limited to 'src')
| -rw-r--r-- | src/video_core/shader/decode/memory.cpp | 17 | ||||
| -rw-r--r-- | src/video_core/shader/shader_ir.h | 5 |
2 files changed, 22 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp index ea1092db1..4aa74965f 100644 --- a/src/video_core/shader/decode/memory.cpp +++ b/src/video_core/shader/decode/memory.cpp | |||
| @@ -12,6 +12,8 @@ | |||
| 12 | #include "video_core/engines/shader_bytecode.h" | 12 | #include "video_core/engines/shader_bytecode.h" |
| 13 | #include "video_core/shader/shader_ir.h" | 13 | #include "video_core/shader/shader_ir.h" |
| 14 | 14 | ||
| 15 | #pragma optimize("", off) | ||
| 16 | |||
| 15 | namespace VideoCommon::Shader { | 17 | namespace VideoCommon::Shader { |
| 16 | 18 | ||
| 17 | using Tegra::Shader::Attribute; | 19 | using Tegra::Shader::Attribute; |
| @@ -239,6 +241,21 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) { | |||
| 239 | } | 241 | } |
| 240 | break; | 242 | break; |
| 241 | } | 243 | } |
| 244 | case OpCode::Id::AL2P: { | ||
| 245 | // Ignore al2p.direction since we don't care about it. | ||
| 246 | |||
| 247 | // Calculate emulation fake physical address. | ||
| 248 | const Node fixed_address{Immediate(static_cast<u32>(instr.al2p.address))}; | ||
| 249 | const Node reg{GetRegister(instr.gpr8)}; | ||
| 250 | const Node fake_address{Operation(OperationCode::IAdd, NO_PRECISE, reg, fixed_address)}; | ||
| 251 | |||
| 252 | // Set the fake address to target register. | ||
| 253 | SetRegister(bb, instr.gpr0, fake_address); | ||
| 254 | |||
| 255 | // Signal the shader IR to declare all possible attributes and varyings | ||
| 256 | use_physical_attributes = true; | ||
| 257 | break; | ||
| 258 | } | ||
| 242 | default: | 259 | default: |
| 243 | UNIMPLEMENTED_MSG("Unhandled memory instruction: {}", opcode->get().GetName()); | 260 | UNIMPLEMENTED_MSG("Unhandled memory instruction: {}", opcode->get().GetName()); |
| 244 | } | 261 | } |
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h index 65f1e1de9..b157608b7 100644 --- a/src/video_core/shader/shader_ir.h +++ b/src/video_core/shader/shader_ir.h | |||
| @@ -615,6 +615,10 @@ public: | |||
| 615 | return static_cast<std::size_t>(coverage_end * sizeof(u64)); | 615 | return static_cast<std::size_t>(coverage_end * sizeof(u64)); |
| 616 | } | 616 | } |
| 617 | 617 | ||
| 618 | bool HasPhysicalAttributes() const { | ||
| 619 | return use_physical_attributes; | ||
| 620 | } | ||
| 621 | |||
| 618 | const Tegra::Shader::Header& GetHeader() const { | 622 | const Tegra::Shader::Header& GetHeader() const { |
| 619 | return header; | 623 | return header; |
| 620 | } | 624 | } |
| @@ -879,6 +883,7 @@ private: | |||
| 879 | std::set<Sampler> used_samplers; | 883 | std::set<Sampler> used_samplers; |
| 880 | std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances> used_clip_distances{}; | 884 | std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances> used_clip_distances{}; |
| 881 | std::map<GlobalMemoryBase, GlobalMemoryUsage> used_global_memory; | 885 | std::map<GlobalMemoryBase, GlobalMemoryUsage> used_global_memory; |
| 886 | bool use_physical_attributes = true; // Shader uses AL2P | ||
| 882 | 887 | ||
| 883 | Tegra::Shader::Header header; | 888 | Tegra::Shader::Header header; |
| 884 | }; | 889 | }; |