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authorGravatar bunnei2018-06-09 00:42:44 -0400
committerGravatar GitHub2018-06-09 00:42:44 -0400
commite2176dc7ce937e03c002342a1d5e9d8f61212215 (patch)
tree6eb241cd96ae3d9be7e67acc29715c2403049264 /src
parentMerge pull request #549 from bunnei/iadd (diff)
parentgl_shader_decompiler: Implement SHR instruction. (diff)
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Merge pull request #551 from bunnei/shr
gl_shader_decompiler: Implement SHR instruction.
Diffstat (limited to '')
-rw-r--r--src/video_core/engines/shader_bytecode.h4
-rw-r--r--src/video_core/renderer_opengl/gl_shader_decompiler.cpp13
2 files changed, 17 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index dc3dd8a80..51dcc0d08 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -261,6 +261,10 @@ union Instruction {
261 } alu; 261 } alu;
262 262
263 union { 263 union {
264 BitField<48, 1, u64> is_signed;
265 } shift;
266
267 union {
264 BitField<39, 5, u64> shift_amount; 268 BitField<39, 5, u64> shift_amount;
265 BitField<48, 1, u64> negate_b; 269 BitField<48, 1, u64> negate_b;
266 BitField<49, 1, u64> negate_a; 270 BitField<49, 1, u64> negate_a;
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
index 4e248d328..07a90f5ad 100644
--- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
+++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp
@@ -979,6 +979,19 @@ private:
979 } 979 }
980 980
981 switch (opcode->GetId()) { 981 switch (opcode->GetId()) {
982 case OpCode::Id::SHR_C:
983 case OpCode::Id::SHR_R:
984 case OpCode::Id::SHR_IMM: {
985 if (!instr.shift.is_signed) {
986 // Logical shift right
987 op_a = "uint(" + op_a + ')';
988 }
989
990 // Cast to int is superfluous for arithmetic shift, it's only for a logical shift
991 regs.SetRegisterToInteger(instr.gpr0, true, 0, "int(" + op_a + " >> " + op_b + ')',
992 1, 1);
993 break;
994 }
982 case OpCode::Id::SHL_C: 995 case OpCode::Id::SHL_C:
983 case OpCode::Id::SHL_R: 996 case OpCode::Id::SHL_R:
984 case OpCode::Id::SHL_IMM: 997 case OpCode::Id::SHL_IMM: