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| author | 2022-10-16 00:50:53 -0400 | |
|---|---|---|
| committer | 2022-10-16 00:50:53 -0400 | |
| commit | ddf5577799f623c8a6e2061197b2464127eed8da (patch) | |
| tree | e9d6017e1ad38b0d573b4e8a0f85563c9e911dc2 /src | |
| parent | general: Fix spelling of "unknown" (diff) | |
| download | yuzu-ddf5577799f623c8a6e2061197b2464127eed8da.tar.gz yuzu-ddf5577799f623c8a6e2061197b2464127eed8da.tar.xz yuzu-ddf5577799f623c8a6e2061197b2464127eed8da.zip | |
video_core: Fix spelling of "synchronize"
Diffstat (limited to '')
| -rw-r--r-- | src/video_core/texture_cache/descriptor_table.h | 2 | ||||
| -rw-r--r-- | src/video_core/texture_cache/texture_cache.h | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/video_core/texture_cache/descriptor_table.h b/src/video_core/texture_cache/descriptor_table.h index b18e3838f..ee4240288 100644 --- a/src/video_core/texture_cache/descriptor_table.h +++ b/src/video_core/texture_cache/descriptor_table.h | |||
| @@ -18,7 +18,7 @@ class DescriptorTable { | |||
| 18 | public: | 18 | public: |
| 19 | explicit DescriptorTable(Tegra::MemoryManager& gpu_memory_) : gpu_memory{gpu_memory_} {} | 19 | explicit DescriptorTable(Tegra::MemoryManager& gpu_memory_) : gpu_memory{gpu_memory_} {} |
| 20 | 20 | ||
| 21 | [[nodiscard]] bool Synchornize(GPUVAddr gpu_addr, u32 limit) { | 21 | [[nodiscard]] bool Synchronize(GPUVAddr gpu_addr, u32 limit) { |
| 22 | [[likely]] if (current_gpu_addr == gpu_addr && current_limit == limit) { | 22 | [[likely]] if (current_gpu_addr == gpu_addr && current_limit == limit) { |
| 23 | return false; | 23 | return false; |
| 24 | } | 24 | } |
diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h index 413baf730..0e0fd410f 100644 --- a/src/video_core/texture_cache/texture_cache.h +++ b/src/video_core/texture_cache/texture_cache.h | |||
| @@ -193,11 +193,11 @@ void TextureCache<P>::SynchronizeGraphicsDescriptors() { | |||
| 193 | const bool linked_tsc = maxwell3d->regs.sampler_binding == SamplerBinding::ViaHeaderBinding; | 193 | const bool linked_tsc = maxwell3d->regs.sampler_binding == SamplerBinding::ViaHeaderBinding; |
| 194 | const u32 tic_limit = maxwell3d->regs.tex_header.limit; | 194 | const u32 tic_limit = maxwell3d->regs.tex_header.limit; |
| 195 | const u32 tsc_limit = linked_tsc ? tic_limit : maxwell3d->regs.tex_sampler.limit; | 195 | const u32 tsc_limit = linked_tsc ? tic_limit : maxwell3d->regs.tex_sampler.limit; |
| 196 | if (channel_state->graphics_sampler_table.Synchornize(maxwell3d->regs.tex_sampler.Address(), | 196 | if (channel_state->graphics_sampler_table.Synchronize(maxwell3d->regs.tex_sampler.Address(), |
| 197 | tsc_limit)) { | 197 | tsc_limit)) { |
| 198 | channel_state->graphics_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID); | 198 | channel_state->graphics_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID); |
| 199 | } | 199 | } |
| 200 | if (channel_state->graphics_image_table.Synchornize(maxwell3d->regs.tex_header.Address(), | 200 | if (channel_state->graphics_image_table.Synchronize(maxwell3d->regs.tex_header.Address(), |
| 201 | tic_limit)) { | 201 | tic_limit)) { |
| 202 | channel_state->graphics_image_view_ids.resize(tic_limit + 1, CORRUPT_ID); | 202 | channel_state->graphics_image_view_ids.resize(tic_limit + 1, CORRUPT_ID); |
| 203 | } | 203 | } |
| @@ -209,10 +209,10 @@ void TextureCache<P>::SynchronizeComputeDescriptors() { | |||
| 209 | const u32 tic_limit = kepler_compute->regs.tic.limit; | 209 | const u32 tic_limit = kepler_compute->regs.tic.limit; |
| 210 | const u32 tsc_limit = linked_tsc ? tic_limit : kepler_compute->regs.tsc.limit; | 210 | const u32 tsc_limit = linked_tsc ? tic_limit : kepler_compute->regs.tsc.limit; |
| 211 | const GPUVAddr tsc_gpu_addr = kepler_compute->regs.tsc.Address(); | 211 | const GPUVAddr tsc_gpu_addr = kepler_compute->regs.tsc.Address(); |
| 212 | if (channel_state->compute_sampler_table.Synchornize(tsc_gpu_addr, tsc_limit)) { | 212 | if (channel_state->compute_sampler_table.Synchronize(tsc_gpu_addr, tsc_limit)) { |
| 213 | channel_state->compute_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID); | 213 | channel_state->compute_sampler_ids.resize(tsc_limit + 1, CORRUPT_ID); |
| 214 | } | 214 | } |
| 215 | if (channel_state->compute_image_table.Synchornize(kepler_compute->regs.tic.Address(), | 215 | if (channel_state->compute_image_table.Synchronize(kepler_compute->regs.tic.Address(), |
| 216 | tic_limit)) { | 216 | tic_limit)) { |
| 217 | channel_state->compute_image_view_ids.resize(tic_limit + 1, CORRUPT_ID); | 217 | channel_state->compute_image_view_ids.resize(tic_limit + 1, CORRUPT_ID); |
| 218 | } | 218 | } |