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authorGravatar ReinUsesLisp2021-03-27 03:08:31 -0300
committerGravatar ameerj2021-07-22 21:51:24 -0400
commit675a82416d7775dc7a252a5d8f5b704e6b8f2326 (patch)
tree4964c92716029716255d75e26dcc033487df6b1e /src
parentvk_pipeline_cache: Fix pipeline and shader caches (diff)
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spirv: Remove dependencies on Environment when generating SPIR-V
Diffstat (limited to '')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.cpp11
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.h5
-rw-r--r--src/shader_recompiler/frontend/ir/program.h2
-rw-r--r--src/shader_recompiler/frontend/maxwell/program.cpp3
-rw-r--r--src/video_core/renderer_vulkan/vk_pipeline_cache.cpp10
5 files changed, 15 insertions, 16 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.cpp b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
index 4bed16e7b..2e7e6bb0c 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.cpp
@@ -126,12 +126,12 @@ Id DefineMain(EmitContext& ctx, IR::Program& program) {
126 return main; 126 return main;
127} 127}
128 128
129void DefineEntryPoint(Environment& env, const IR::Program& program, EmitContext& ctx, Id main) { 129void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
130 const std::span interfaces(ctx.interfaces.data(), ctx.interfaces.size()); 130 const std::span interfaces(ctx.interfaces.data(), ctx.interfaces.size());
131 spv::ExecutionModel execution_model{}; 131 spv::ExecutionModel execution_model{};
132 switch (program.stage) { 132 switch (program.stage) {
133 case Shader::Stage::Compute: { 133 case Shader::Stage::Compute: {
134 const std::array<u32, 3> workgroup_size{env.WorkgroupSize()}; 134 const std::array<u32, 3> workgroup_size{program.workgroup_size};
135 execution_model = spv::ExecutionModel::GLCompute; 135 execution_model = spv::ExecutionModel::GLCompute;
136 ctx.AddExecutionMode(main, spv::ExecutionMode::LocalSize, workgroup_size[0], 136 ctx.AddExecutionMode(main, spv::ExecutionMode::LocalSize, workgroup_size[0],
137 workgroup_size[1], workgroup_size[2]); 137 workgroup_size[1], workgroup_size[2]);
@@ -148,7 +148,7 @@ void DefineEntryPoint(Environment& env, const IR::Program& program, EmitContext&
148 } 148 }
149 break; 149 break;
150 default: 150 default:
151 throw NotImplementedException("Stage {}", env.ShaderStage()); 151 throw NotImplementedException("Stage {}", program.stage);
152 } 152 }
153 ctx.AddEntryPoint(execution_model, main, "main", interfaces); 153 ctx.AddEntryPoint(execution_model, main, "main", interfaces);
154} 154}
@@ -267,11 +267,10 @@ Id PhiArgDef(EmitContext& ctx, IR::Inst* inst, size_t index) {
267} 267}
268} // Anonymous namespace 268} // Anonymous namespace
269 269
270std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, IR::Program& program, 270std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, u32& binding) {
271 u32& binding) {
272 EmitContext ctx{profile, program, binding}; 271 EmitContext ctx{profile, program, binding};
273 const Id main{DefineMain(ctx, program)}; 272 const Id main{DefineMain(ctx, program)};
274 DefineEntryPoint(env, program, ctx, main); 273 DefineEntryPoint(program, ctx, main);
275 if (profile.support_float_controls) { 274 if (profile.support_float_controls) {
276 ctx.AddExtension("SPV_KHR_float_controls"); 275 ctx.AddExtension("SPV_KHR_float_controls");
277 SetupDenormControl(profile, program, ctx, main); 276 SetupDenormControl(profile, program, ctx, main);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index b82b16e9d..837f0e858 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -8,15 +8,14 @@
8 8
9#include "common/common_types.h" 9#include "common/common_types.h"
10#include "shader_recompiler/backend/spirv/emit_context.h" 10#include "shader_recompiler/backend/spirv/emit_context.h"
11#include "shader_recompiler/environment.h"
12#include "shader_recompiler/frontend/ir/microinstruction.h" 11#include "shader_recompiler/frontend/ir/microinstruction.h"
13#include "shader_recompiler/frontend/ir/program.h" 12#include "shader_recompiler/frontend/ir/program.h"
14#include "shader_recompiler/profile.h" 13#include "shader_recompiler/profile.h"
15 14
16namespace Shader::Backend::SPIRV { 15namespace Shader::Backend::SPIRV {
17 16
18[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, 17[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program,
19 IR::Program& program, u32& binding); 18 u32& binding);
20 19
21// Microinstruction emitters 20// Microinstruction emitters
22Id EmitPhi(EmitContext& ctx, IR::Inst* inst); 21Id EmitPhi(EmitContext& ctx, IR::Inst* inst);
diff --git a/src/shader_recompiler/frontend/ir/program.h b/src/shader_recompiler/frontend/ir/program.h
index 733513c8b..0162e919c 100644
--- a/src/shader_recompiler/frontend/ir/program.h
+++ b/src/shader_recompiler/frontend/ir/program.h
@@ -4,6 +4,7 @@
4 4
5#pragma once 5#pragma once
6 6
7#include <array>
7#include <string> 8#include <string>
8 9
9#include <boost/container/small_vector.hpp> 10#include <boost/container/small_vector.hpp>
@@ -19,6 +20,7 @@ struct Program {
19 BlockList post_order_blocks; 20 BlockList post_order_blocks;
20 Info info; 21 Info info;
21 Stage stage{}; 22 Stage stage{};
23 std::array<u32, 3> workgroup_size{};
22}; 24};
23 25
24[[nodiscard]] std::string DumpProgram(const Program& program); 26[[nodiscard]] std::string DumpProgram(const Program& program);
diff --git a/src/shader_recompiler/frontend/maxwell/program.cpp b/src/shader_recompiler/frontend/maxwell/program.cpp
index 0074eb89b..6efaf6ee0 100644
--- a/src/shader_recompiler/frontend/maxwell/program.cpp
+++ b/src/shader_recompiler/frontend/maxwell/program.cpp
@@ -33,6 +33,9 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
33 program.blocks = VisitAST(inst_pool, block_pool, env, cfg); 33 program.blocks = VisitAST(inst_pool, block_pool, env, cfg);
34 program.post_order_blocks = PostOrder(program.blocks); 34 program.post_order_blocks = PostOrder(program.blocks);
35 program.stage = env.ShaderStage(); 35 program.stage = env.ShaderStage();
36 if (program.stage == Stage::Compute) {
37 program.workgroup_size = env.WorkgroupSize();
38 }
36 RemoveUnreachableBlocks(program); 39 RemoveUnreachableBlocks(program);
37 40
38 // Replace instructions before the SSA rewrite 41 // Replace instructions before the SSA rewrite
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
index 51c155077..251559b16 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
@@ -680,7 +680,6 @@ GraphicsPipeline PipelineCache::CreateGraphicsPipeline(ShaderPools& pools,
680 std::array<vk::ShaderModule, Maxwell::MaxShaderStage> modules; 680 std::array<vk::ShaderModule, Maxwell::MaxShaderStage> modules;
681 681
682 u32 binding{0}; 682 u32 binding{0};
683 env_index = 0;
684 for (size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) { 683 for (size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
685 if (key.unique_hashes[index] == u128{}) { 684 if (key.unique_hashes[index] == u128{}) {
686 continue; 685 continue;
@@ -691,11 +690,8 @@ GraphicsPipeline PipelineCache::CreateGraphicsPipeline(ShaderPools& pools,
691 const size_t stage_index{index - 1}; 690 const size_t stage_index{index - 1};
692 infos[stage_index] = &program.info; 691 infos[stage_index] = &program.info;
693 692
694 Shader::Environment& env{*envs[env_index]}; 693 const Shader::Profile profile{MakeProfile(key, program.stage)};
695 ++env_index; 694 const std::vector<u32> code{EmitSPIRV(profile, program, binding)};
696
697 const Shader::Profile profile{MakeProfile(key, env.ShaderStage())};
698 const std::vector<u32> code{EmitSPIRV(profile, env, program, binding)};
699 modules[stage_index] = BuildShader(device, code); 695 modules[stage_index] = BuildShader(device, code);
700 } 696 }
701 return GraphicsPipeline(maxwell3d, gpu_memory, scheduler, buffer_cache, texture_cache, device, 697 return GraphicsPipeline(maxwell3d, gpu_memory, scheduler, buffer_cache, texture_cache, device,
@@ -753,7 +749,7 @@ ComputePipeline PipelineCache::CreateComputePipeline(ShaderPools& pools,
753 Shader::Maxwell::Flow::CFG cfg{env, pools.flow_block, env.StartAddress()}; 749 Shader::Maxwell::Flow::CFG cfg{env, pools.flow_block, env.StartAddress()};
754 Shader::IR::Program program{TranslateProgram(pools.inst, pools.block, env, cfg)}; 750 Shader::IR::Program program{TranslateProgram(pools.inst, pools.block, env, cfg)};
755 u32 binding{0}; 751 u32 binding{0};
756 std::vector<u32> code{EmitSPIRV(base_profile, env, program, binding)}; 752 std::vector<u32> code{EmitSPIRV(base_profile, program, binding)};
757 return ComputePipeline{device, descriptor_pool, update_descriptor_queue, program.info, 753 return ComputePipeline{device, descriptor_pool, update_descriptor_queue, program.info,
758 BuildShader(device, code)}; 754 BuildShader(device, code)};
759} 755}