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| author | 2018-06-06 21:38:22 -0400 | |
|---|---|---|
| committer | 2018-06-06 21:38:22 -0400 | |
| commit | 4732e1f0644c2842f5548855085923a42fc95027 (patch) | |
| tree | 43c6d72726e87ad9ff411ef04ad119cf0bda8093 /src | |
| parent | Merge pull request #534 from Subv/multitexturing (diff) | |
| parent | gl_shader_decompiler: Implement ISETP_IMM instruction. (diff) | |
| download | yuzu-4732e1f0644c2842f5548855085923a42fc95027.tar.gz yuzu-4732e1f0644c2842f5548855085923a42fc95027.tar.xz yuzu-4732e1f0644c2842f5548855085923a42fc95027.zip | |
Merge pull request #536 from bunnei/isetp_imm
gl_shader_decompiler: Implement ISETP_IMM instruction.
Diffstat (limited to '')
| -rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 3067ce3b3..b6c6a4607 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |||
| @@ -1278,16 +1278,17 @@ private: | |||
| 1278 | } | 1278 | } |
| 1279 | case OpCode::Type::IntegerSetPredicate: { | 1279 | case OpCode::Type::IntegerSetPredicate: { |
| 1280 | std::string op_a = regs.GetRegisterAsInteger(instr.gpr8, 0, instr.isetp.is_signed); | 1280 | std::string op_a = regs.GetRegisterAsInteger(instr.gpr8, 0, instr.isetp.is_signed); |
| 1281 | std::string op_b; | ||
| 1281 | 1282 | ||
| 1282 | std::string op_b{}; | 1283 | if (instr.is_b_imm) { |
| 1283 | 1284 | op_b += '(' + std::to_string(instr.alu.GetSignedImm20_20()) + ')'; | |
| 1284 | ASSERT_MSG(!instr.is_b_imm, "ISETP_IMM not implemented"); | ||
| 1285 | |||
| 1286 | if (instr.is_b_gpr) { | ||
| 1287 | op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); | ||
| 1288 | } else { | 1285 | } else { |
| 1289 | op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset, | 1286 | if (instr.is_b_gpr) { |
| 1290 | GLSLRegister::Type::Integer); | 1287 | op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); |
| 1288 | } else { | ||
| 1289 | op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset, | ||
| 1290 | GLSLRegister::Type::Integer); | ||
| 1291 | } | ||
| 1291 | } | 1292 | } |
| 1292 | 1293 | ||
| 1293 | using Tegra::Shader::Pred; | 1294 | using Tegra::Shader::Pred; |