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authorGravatar Rodrigo Locatti2020-09-10 02:28:54 +0000
committerGravatar GitHub2020-09-10 02:28:54 +0000
commit663ea382dae4b0a8d958753fb370416b1602c55e (patch)
tree74db3117e649cb5ae1a265c69f68d2bb03b9d542 /src/video_core/texture_cache
parentMerge pull request #4635 from lioncash/gc-adap (diff)
parentvideo_core: Remove all Core::System references in renderer (diff)
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Merge pull request #4633 from ReinUsesLisp/gpu-init
video_core: Remove all Core::System references in renderer
Diffstat (limited to 'src/video_core/texture_cache')
-rw-r--r--src/video_core/texture_cache/surface_params.cpp11
-rw-r--r--src/video_core/texture_cache/surface_params.h5
-rw-r--r--src/video_core/texture_cache/texture_cache.h51
3 files changed, 31 insertions, 36 deletions
diff --git a/src/video_core/texture_cache/surface_params.cpp b/src/video_core/texture_cache/surface_params.cpp
index e614a92df..e8515321b 100644
--- a/src/video_core/texture_cache/surface_params.cpp
+++ b/src/video_core/texture_cache/surface_params.cpp
@@ -163,13 +163,11 @@ SurfaceParams SurfaceParams::CreateForImage(const FormatLookupTable& lookup_tabl
163 return params; 163 return params;
164} 164}
165 165
166SurfaceParams SurfaceParams::CreateForDepthBuffer(Core::System& system) { 166SurfaceParams SurfaceParams::CreateForDepthBuffer(Tegra::Engines::Maxwell3D& maxwell3d) {
167 const auto& regs = system.GPU().Maxwell3D().regs; 167 const auto& regs = maxwell3d.regs;
168
169 const auto block_depth = std::min(regs.zeta.memory_layout.block_depth.Value(), 5U); 168 const auto block_depth = std::min(regs.zeta.memory_layout.block_depth.Value(), 5U);
170 const bool is_layered = regs.zeta_layers > 1 && block_depth == 0; 169 const bool is_layered = regs.zeta_layers > 1 && block_depth == 0;
171 const auto pixel_format = PixelFormatFromDepthFormat(regs.zeta.format); 170 const auto pixel_format = PixelFormatFromDepthFormat(regs.zeta.format);
172
173 return { 171 return {
174 .is_tiled = regs.zeta.memory_layout.type == 172 .is_tiled = regs.zeta.memory_layout.type ==
175 Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout::BlockLinear, 173 Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout::BlockLinear,
@@ -191,8 +189,9 @@ SurfaceParams SurfaceParams::CreateForDepthBuffer(Core::System& system) {
191 }; 189 };
192} 190}
193 191
194SurfaceParams SurfaceParams::CreateForFramebuffer(Core::System& system, std::size_t index) { 192SurfaceParams SurfaceParams::CreateForFramebuffer(Tegra::Engines::Maxwell3D& maxwell3d,
195 const auto& config{system.GPU().Maxwell3D().regs.rt[index]}; 193 std::size_t index) {
194 const auto& config{maxwell3d.regs.rt[index]};
196 SurfaceParams params; 195 SurfaceParams params;
197 params.is_tiled = 196 params.is_tiled =
198 config.memory_layout.type == Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout::BlockLinear; 197 config.memory_layout.type == Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout::BlockLinear;
diff --git a/src/video_core/texture_cache/surface_params.h b/src/video_core/texture_cache/surface_params.h
index 118aa689e..4466c3c34 100644
--- a/src/video_core/texture_cache/surface_params.h
+++ b/src/video_core/texture_cache/surface_params.h
@@ -33,10 +33,11 @@ public:
33 const VideoCommon::Shader::Image& entry); 33 const VideoCommon::Shader::Image& entry);
34 34
35 /// Creates SurfaceCachedParams for a depth buffer configuration. 35 /// Creates SurfaceCachedParams for a depth buffer configuration.
36 static SurfaceParams CreateForDepthBuffer(Core::System& system); 36 static SurfaceParams CreateForDepthBuffer(Tegra::Engines::Maxwell3D& maxwell3d);
37 37
38 /// Creates SurfaceCachedParams from a framebuffer configuration. 38 /// Creates SurfaceCachedParams from a framebuffer configuration.
39 static SurfaceParams CreateForFramebuffer(Core::System& system, std::size_t index); 39 static SurfaceParams CreateForFramebuffer(Tegra::Engines::Maxwell3D& maxwell3d,
40 std::size_t index);
40 41
41 /// Creates SurfaceCachedParams from a Fermi2D surface configuration. 42 /// Creates SurfaceCachedParams from a Fermi2D surface configuration.
42 static SurfaceParams CreateForFermiCopySurface( 43 static SurfaceParams CreateForFermiCopySurface(
diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h
index 96c4e4cc2..ea835c59f 100644
--- a/src/video_core/texture_cache/texture_cache.h
+++ b/src/video_core/texture_cache/texture_cache.h
@@ -135,8 +135,7 @@ public:
135 return GetNullSurface(SurfaceParams::ExpectedTarget(entry)); 135 return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
136 } 136 }
137 137
138 const std::optional<VAddr> cpu_addr = 138 const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
139 system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
140 if (!cpu_addr) { 139 if (!cpu_addr) {
141 return GetNullSurface(SurfaceParams::ExpectedTarget(entry)); 140 return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
142 } 141 }
@@ -160,8 +159,7 @@ public:
160 if (!gpu_addr) { 159 if (!gpu_addr) {
161 return GetNullSurface(SurfaceParams::ExpectedTarget(entry)); 160 return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
162 } 161 }
163 const std::optional<VAddr> cpu_addr = 162 const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
164 system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
165 if (!cpu_addr) { 163 if (!cpu_addr) {
166 return GetNullSurface(SurfaceParams::ExpectedTarget(entry)); 164 return GetNullSurface(SurfaceParams::ExpectedTarget(entry));
167 } 165 }
@@ -183,11 +181,11 @@ public:
183 181
184 TView GetDepthBufferSurface(bool preserve_contents) { 182 TView GetDepthBufferSurface(bool preserve_contents) {
185 std::lock_guard lock{mutex}; 183 std::lock_guard lock{mutex};
186 auto& maxwell3d = system.GPU().Maxwell3D(); 184 auto& dirty = maxwell3d.dirty;
187 if (!maxwell3d.dirty.flags[VideoCommon::Dirty::ZetaBuffer]) { 185 if (!dirty.flags[VideoCommon::Dirty::ZetaBuffer]) {
188 return depth_buffer.view; 186 return depth_buffer.view;
189 } 187 }
190 maxwell3d.dirty.flags[VideoCommon::Dirty::ZetaBuffer] = false; 188 dirty.flags[VideoCommon::Dirty::ZetaBuffer] = false;
191 189
192 const auto& regs{maxwell3d.regs}; 190 const auto& regs{maxwell3d.regs};
193 const auto gpu_addr{regs.zeta.Address()}; 191 const auto gpu_addr{regs.zeta.Address()};
@@ -195,13 +193,12 @@ public:
195 SetEmptyDepthBuffer(); 193 SetEmptyDepthBuffer();
196 return {}; 194 return {};
197 } 195 }
198 const std::optional<VAddr> cpu_addr = 196 const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
199 system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
200 if (!cpu_addr) { 197 if (!cpu_addr) {
201 SetEmptyDepthBuffer(); 198 SetEmptyDepthBuffer();
202 return {}; 199 return {};
203 } 200 }
204 const auto depth_params{SurfaceParams::CreateForDepthBuffer(system)}; 201 const auto depth_params{SurfaceParams::CreateForDepthBuffer(maxwell3d)};
205 auto surface_view = GetSurface(gpu_addr, *cpu_addr, depth_params, preserve_contents, true); 202 auto surface_view = GetSurface(gpu_addr, *cpu_addr, depth_params, preserve_contents, true);
206 if (depth_buffer.target) 203 if (depth_buffer.target)
207 depth_buffer.target->MarkAsRenderTarget(false, NO_RT); 204 depth_buffer.target->MarkAsRenderTarget(false, NO_RT);
@@ -215,7 +212,6 @@ public:
215 TView GetColorBufferSurface(std::size_t index, bool preserve_contents) { 212 TView GetColorBufferSurface(std::size_t index, bool preserve_contents) {
216 std::lock_guard lock{mutex}; 213 std::lock_guard lock{mutex};
217 ASSERT(index < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets); 214 ASSERT(index < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets);
218 auto& maxwell3d = system.GPU().Maxwell3D();
219 if (!maxwell3d.dirty.flags[VideoCommon::Dirty::ColorBuffer0 + index]) { 215 if (!maxwell3d.dirty.flags[VideoCommon::Dirty::ColorBuffer0 + index]) {
220 return render_targets[index].view; 216 return render_targets[index].view;
221 } 217 }
@@ -235,15 +231,14 @@ public:
235 return {}; 231 return {};
236 } 232 }
237 233
238 const std::optional<VAddr> cpu_addr = 234 const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
239 system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
240 if (!cpu_addr) { 235 if (!cpu_addr) {
241 SetEmptyColorBuffer(index); 236 SetEmptyColorBuffer(index);
242 return {}; 237 return {};
243 } 238 }
244 239
245 auto surface_view = 240 auto surface_view =
246 GetSurface(gpu_addr, *cpu_addr, SurfaceParams::CreateForFramebuffer(system, index), 241 GetSurface(gpu_addr, *cpu_addr, SurfaceParams::CreateForFramebuffer(maxwell3d, index),
247 preserve_contents, true); 242 preserve_contents, true);
248 if (render_targets[index].target) { 243 if (render_targets[index].target) {
249 auto& surface = render_targets[index].target; 244 auto& surface = render_targets[index].target;
@@ -300,9 +295,8 @@ public:
300 const GPUVAddr dst_gpu_addr = dst_config.Address(); 295 const GPUVAddr dst_gpu_addr = dst_config.Address();
301 DeduceBestBlit(src_params, dst_params, src_gpu_addr, dst_gpu_addr); 296 DeduceBestBlit(src_params, dst_params, src_gpu_addr, dst_gpu_addr);
302 297
303 const auto& memory_manager = system.GPU().MemoryManager(); 298 const std::optional<VAddr> dst_cpu_addr = gpu_memory.GpuToCpuAddress(dst_gpu_addr);
304 const std::optional<VAddr> dst_cpu_addr = memory_manager.GpuToCpuAddress(dst_gpu_addr); 299 const std::optional<VAddr> src_cpu_addr = gpu_memory.GpuToCpuAddress(src_gpu_addr);
305 const std::optional<VAddr> src_cpu_addr = memory_manager.GpuToCpuAddress(src_gpu_addr);
306 std::pair dst_surface = GetSurface(dst_gpu_addr, *dst_cpu_addr, dst_params, true, false); 300 std::pair dst_surface = GetSurface(dst_gpu_addr, *dst_cpu_addr, dst_params, true, false);
307 TView src_surface = GetSurface(src_gpu_addr, *src_cpu_addr, src_params, true, false).second; 301 TView src_surface = GetSurface(src_gpu_addr, *src_cpu_addr, src_params, true, false).second;
308 ImageBlit(src_surface, dst_surface.second, copy_config); 302 ImageBlit(src_surface, dst_surface.second, copy_config);
@@ -358,9 +352,11 @@ public:
358 } 352 }
359 353
360protected: 354protected:
361 explicit TextureCache(Core::System& system, VideoCore::RasterizerInterface& rasterizer, 355 explicit TextureCache(VideoCore::RasterizerInterface& rasterizer_,
362 bool is_astc_supported) 356 Tegra::Engines::Maxwell3D& maxwell3d_, Tegra::MemoryManager& gpu_memory_,
363 : system{system}, is_astc_supported{is_astc_supported}, rasterizer{rasterizer} { 357 bool is_astc_supported_)
358 : is_astc_supported{is_astc_supported_}, rasterizer{rasterizer_}, maxwell3d{maxwell3d_},
359 gpu_memory{gpu_memory_} {
364 for (std::size_t i = 0; i < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets; i++) { 360 for (std::size_t i = 0; i < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets; i++) {
365 SetEmptyColorBuffer(i); 361 SetEmptyColorBuffer(i);
366 } 362 }
@@ -395,7 +391,7 @@ protected:
395 virtual void BufferCopy(TSurface& src_surface, TSurface& dst_surface) = 0; 391 virtual void BufferCopy(TSurface& src_surface, TSurface& dst_surface) = 0;
396 392
397 void ManageRenderTargetUnregister(TSurface& surface) { 393 void ManageRenderTargetUnregister(TSurface& surface) {
398 auto& dirty = system.GPU().Maxwell3D().dirty; 394 auto& dirty = maxwell3d.dirty;
399 const u32 index = surface->GetRenderTarget(); 395 const u32 index = surface->GetRenderTarget();
400 if (index == DEPTH_RT) { 396 if (index == DEPTH_RT) {
401 dirty.flags[VideoCommon::Dirty::ZetaBuffer] = true; 397 dirty.flags[VideoCommon::Dirty::ZetaBuffer] = true;
@@ -408,8 +404,7 @@ protected:
408 void Register(TSurface surface) { 404 void Register(TSurface surface) {
409 const GPUVAddr gpu_addr = surface->GetGpuAddr(); 405 const GPUVAddr gpu_addr = surface->GetGpuAddr();
410 const std::size_t size = surface->GetSizeInBytes(); 406 const std::size_t size = surface->GetSizeInBytes();
411 const std::optional<VAddr> cpu_addr = 407 const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
412 system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
413 if (!cpu_addr) { 408 if (!cpu_addr) {
414 LOG_CRITICAL(HW_GPU, "Failed to register surface with unmapped gpu_address 0x{:016x}", 409 LOG_CRITICAL(HW_GPU, "Failed to register surface with unmapped gpu_address 0x{:016x}",
415 gpu_addr); 410 gpu_addr);
@@ -459,7 +454,6 @@ protected:
459 return new_surface; 454 return new_surface;
460 } 455 }
461 456
462 Core::System& system;
463 const bool is_astc_supported; 457 const bool is_astc_supported;
464 458
465private: 459private:
@@ -954,8 +948,7 @@ private:
954 * @param params The parameters on the candidate surface. 948 * @param params The parameters on the candidate surface.
955 **/ 949 **/
956 Deduction DeduceSurface(const GPUVAddr gpu_addr, const SurfaceParams& params) { 950 Deduction DeduceSurface(const GPUVAddr gpu_addr, const SurfaceParams& params) {
957 const std::optional<VAddr> cpu_addr = 951 const std::optional<VAddr> cpu_addr = gpu_memory.GpuToCpuAddress(gpu_addr);
958 system.GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
959 952
960 if (!cpu_addr) { 953 if (!cpu_addr) {
961 Deduction result{}; 954 Deduction result{};
@@ -1112,7 +1105,7 @@ private:
1112 1105
1113 void LoadSurface(const TSurface& surface) { 1106 void LoadSurface(const TSurface& surface) {
1114 staging_cache.GetBuffer(0).resize(surface->GetHostSizeInBytes()); 1107 staging_cache.GetBuffer(0).resize(surface->GetHostSizeInBytes());
1115 surface->LoadBuffer(system.GPU().MemoryManager(), staging_cache); 1108 surface->LoadBuffer(gpu_memory, staging_cache);
1116 surface->UploadTexture(staging_cache.GetBuffer(0)); 1109 surface->UploadTexture(staging_cache.GetBuffer(0));
1117 surface->MarkAsModified(false, Tick()); 1110 surface->MarkAsModified(false, Tick());
1118 } 1111 }
@@ -1123,7 +1116,7 @@ private:
1123 } 1116 }
1124 staging_cache.GetBuffer(0).resize(surface->GetHostSizeInBytes()); 1117 staging_cache.GetBuffer(0).resize(surface->GetHostSizeInBytes());
1125 surface->DownloadTexture(staging_cache.GetBuffer(0)); 1118 surface->DownloadTexture(staging_cache.GetBuffer(0));
1126 surface->FlushBuffer(system.GPU().MemoryManager(), staging_cache); 1119 surface->FlushBuffer(gpu_memory, staging_cache);
1127 surface->MarkAsModified(false, Tick()); 1120 surface->MarkAsModified(false, Tick());
1128 } 1121 }
1129 1122
@@ -1253,6 +1246,8 @@ private:
1253 } 1246 }
1254 1247
1255 VideoCore::RasterizerInterface& rasterizer; 1248 VideoCore::RasterizerInterface& rasterizer;
1249 Tegra::Engines::Maxwell3D& maxwell3d;
1250 Tegra::MemoryManager& gpu_memory;
1256 1251
1257 FormatLookupTable format_lookup_table; 1252 FormatLookupTable format_lookup_table;
1258 FormatCompatibility format_compatibility; 1253 FormatCompatibility format_compatibility;