summaryrefslogtreecommitdiff
path: root/src/video_core/shader
diff options
context:
space:
mode:
authorGravatar ReinUsesLisp2020-01-27 01:14:25 -0300
committerGravatar ReinUsesLisp2020-01-27 01:15:44 -0300
commite3fc3459c817398fdc9a878c2e554e4580b1d863 (patch)
tree60f589d1c76bb589b9d171ae6e4ac2395288ed36 /src/video_core/shader
parentMerge pull request #3343 from FearlessTobi/ui-tab (diff)
downloadyuzu-e3fc3459c817398fdc9a878c2e554e4580b1d863.tar.gz
yuzu-e3fc3459c817398fdc9a878c2e554e4580b1d863.tar.xz
yuzu-e3fc3459c817398fdc9a878c2e554e4580b1d863.zip
shader/arithmetic: Implement FCMP
Compares the third operand with zero, then selects between the first and second.
Diffstat (limited to 'src/video_core/shader')
-rw-r--r--src/video_core/shader/decode/arithmetic.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp
index fcedd2af6..90240c765 100644
--- a/src/video_core/shader/decode/arithmetic.cpp
+++ b/src/video_core/shader/decode/arithmetic.cpp
@@ -21,7 +21,7 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
21 21
22 Node op_a = GetRegister(instr.gpr8); 22 Node op_a = GetRegister(instr.gpr8);
23 23
24 Node op_b = [&]() -> Node { 24 Node op_b = [&] {
25 if (instr.is_b_imm) { 25 if (instr.is_b_imm) {
26 return GetImmediate19(instr); 26 return GetImmediate19(instr);
27 } else if (instr.is_b_gpr) { 27 } else if (instr.is_b_gpr) {
@@ -141,6 +141,15 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
141 SetRegister(bb, instr.gpr0, value); 141 SetRegister(bb, instr.gpr0, value);
142 break; 142 break;
143 } 143 }
144 case OpCode::Id::FCMP_R: {
145 UNIMPLEMENTED_IF(instr.fcmp.ftz == 0);
146 Node op_c = GetRegister(instr.gpr39);
147 Node comp = GetPredicateComparisonFloat(instr.fcmp.cond, std::move(op_c), Immediate(0.0f));
148 SetRegister(
149 bb, instr.gpr0,
150 Operation(OperationCode::Select, std::move(comp), std::move(op_a), std::move(op_b)));
151 break;
152 }
144 case OpCode::Id::RRO_C: 153 case OpCode::Id::RRO_C:
145 case OpCode::Id::RRO_R: 154 case OpCode::Id::RRO_R:
146 case OpCode::Id::RRO_IMM: { 155 case OpCode::Id::RRO_IMM: {