summaryrefslogtreecommitdiff
path: root/src/video_core/shader/shader.cpp
diff options
context:
space:
mode:
authorGravatar Yuri Kunde Schlesner2017-02-04 13:02:48 -0800
committerGravatar GitHub2017-02-04 13:02:48 -0800
commit97e06b0a0daccd3347ae1bcaf294093b5af32e85 (patch)
tree59e1997c90558f58f7368d6974c355e1f20d8f32 /src/video_core/shader/shader.cpp
parentMerge pull request #2414 from yuriks/texture-decode (diff)
parentVideoCore: Make PrimitiveAssembler const-correct (diff)
downloadyuzu-97e06b0a0daccd3347ae1bcaf294093b5af32e85.tar.gz
yuzu-97e06b0a0daccd3347ae1bcaf294093b5af32e85.tar.xz
yuzu-97e06b0a0daccd3347ae1bcaf294093b5af32e85.zip
Merge pull request #2476 from yuriks/shader-refactor3
Oh No! More shader changes!
Diffstat (limited to 'src/video_core/shader/shader.cpp')
-rw-r--r--src/video_core/shader/shader.cpp63
1 files changed, 33 insertions, 30 deletions
diff --git a/src/video_core/shader/shader.cpp b/src/video_core/shader/shader.cpp
index 2da50bd62..f5f7ea61d 100644
--- a/src/video_core/shader/shader.cpp
+++ b/src/video_core/shader/shader.cpp
@@ -4,6 +4,7 @@
4 4
5#include <cmath> 5#include <cmath>
6#include <cstring> 6#include <cstring>
7#include "common/bit_set.h"
7#include "common/logging/log.h" 8#include "common/logging/log.h"
8#include "common/microprofile.h" 9#include "common/microprofile.h"
9#include "video_core/pica.h" 10#include "video_core/pica.h"
@@ -19,38 +20,32 @@ namespace Pica {
19 20
20namespace Shader { 21namespace Shader {
21 22
22OutputVertex OutputVertex::FromRegisters(Math::Vec4<float24> output_regs[16], const Regs& regs, 23OutputVertex OutputVertex::FromAttributeBuffer(const Regs& regs, AttributeBuffer& input) {
23 u32 output_mask) {
24 // Setup output data 24 // Setup output data
25 OutputVertex ret; 25 union {
26 // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to 26 OutputVertex ret{};
27 // figure out what those circumstances are and enable the remaining outputs then. 27 std::array<float24, 24> vertex_slots;
28 unsigned index = 0; 28 };
29 for (unsigned i = 0; i < 7; ++i) { 29 static_assert(sizeof(vertex_slots) == sizeof(ret), "Struct and array have different sizes.");
30 30
31 if (index >= regs.vs_output_total) 31 unsigned int num_attributes = regs.vs_output_total;
32 break; 32 ASSERT(num_attributes <= 7);
33 for (unsigned int i = 0; i < num_attributes; ++i) {
34 const auto& output_register_map = regs.vs_output_attributes[i];
33 35
34 if ((output_mask & (1 << i)) == 0) 36 Regs::VSOutputAttributes::Semantic semantics[4] = {
35 continue; 37 output_register_map.map_x, output_register_map.map_y, output_register_map.map_z,
36 38 output_register_map.map_w};
37 const auto& output_register_map = regs.vs_output_attributes[index];
38
39 u32 semantics[4] = {output_register_map.map_x, output_register_map.map_y,
40 output_register_map.map_z, output_register_map.map_w};
41 39
42 for (unsigned comp = 0; comp < 4; ++comp) { 40 for (unsigned comp = 0; comp < 4; ++comp) {
43 float24* out = ((float24*)&ret) + semantics[comp]; 41 Regs::VSOutputAttributes::Semantic semantic = semantics[comp];
44 if (semantics[comp] != Regs::VSOutputAttributes::INVALID) { 42 float24* out = &vertex_slots[semantic];
45 *out = output_regs[i][comp]; 43 if (semantic < vertex_slots.size()) {
46 } else { 44 *out = input.attr[i][comp];
47 // Zero output so that attributes which aren't output won't have denormals in them, 45 } else if (semantic != Regs::VSOutputAttributes::INVALID) {
48 // which would slow us down later. 46 LOG_ERROR(HW_GPU, "Invalid/unknown semantic id: %u", (unsigned int)semantic);
49 memset(out, 0, sizeof(*out));
50 } 47 }
51 } 48 }
52
53 index++;
54 } 49 }
55 50
56 // The hardware takes the absolute and saturates vertex colors like this, *before* doing 51 // The hardware takes the absolute and saturates vertex colors like this, *before* doing
@@ -71,12 +66,20 @@ OutputVertex OutputVertex::FromRegisters(Math::Vec4<float24> output_regs[16], co
71 return ret; 66 return ret;
72} 67}
73 68
74void UnitState::LoadInputVertex(const InputVertex& input, int num_attributes) { 69void UnitState::LoadInput(const Regs::ShaderConfig& config, const AttributeBuffer& input) {
75 // Setup input register table 70 const unsigned max_attribute = config.max_input_attribute_index;
76 const auto& attribute_register_map = g_state.regs.vs.input_register_map;
77 71
78 for (int i = 0; i < num_attributes; i++) 72 for (unsigned attr = 0; attr <= max_attribute; ++attr) {
79 registers.input[attribute_register_map.GetRegisterForAttribute(i)] = input.attr[i]; 73 unsigned reg = config.GetRegisterForAttribute(attr);
74 registers.input[reg] = input.attr[attr];
75 }
76}
77
78void UnitState::WriteOutput(const Regs::ShaderConfig& config, AttributeBuffer& output) {
79 unsigned int output_i = 0;
80 for (unsigned int reg : Common::BitSet<u32>(config.output_mask)) {
81 output.attr[output_i++] = registers.output[reg];
82 }
80} 83}
81 84
82MICROPROFILE_DEFINE(GPU_Shader, "GPU", "Shader", MP_RGB(50, 50, 240)); 85MICROPROFILE_DEFINE(GPU_Shader, "GPU", "Shader", MP_RGB(50, 50, 240));