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authorGravatar Yuri Kunde Schlesner2016-12-17 14:38:03 -0800
committerGravatar Yuri Kunde Schlesner2017-01-25 18:53:25 -0800
commit6fa3687afc97685101f9ee5c65cf98f505980695 (patch)
treeeb8c3927526cff06dbf9676499ca2e9fc11eda02 /src/video_core/shader/shader.cpp
parentShader: Initialize conditional_code in interpreter (diff)
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Shader: Remove OutputRegisters struct
Diffstat (limited to 'src/video_core/shader/shader.cpp')
-rw-r--r--src/video_core/shader/shader.cpp11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/video_core/shader/shader.cpp b/src/video_core/shader/shader.cpp
index 1662b5d38..2da50bd62 100644
--- a/src/video_core/shader/shader.cpp
+++ b/src/video_core/shader/shader.cpp
@@ -19,7 +19,8 @@ namespace Pica {
19 19
20namespace Shader { 20namespace Shader {
21 21
22OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) const { 22OutputVertex OutputVertex::FromRegisters(Math::Vec4<float24> output_regs[16], const Regs& regs,
23 u32 output_mask) {
23 // Setup output data 24 // Setup output data
24 OutputVertex ret; 25 OutputVertex ret;
25 // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to 26 // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to
@@ -27,13 +28,13 @@ OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) const {
27 unsigned index = 0; 28 unsigned index = 0;
28 for (unsigned i = 0; i < 7; ++i) { 29 for (unsigned i = 0; i < 7; ++i) {
29 30
30 if (index >= g_state.regs.vs_output_total) 31 if (index >= regs.vs_output_total)
31 break; 32 break;
32 33
33 if ((config.output_mask & (1 << i)) == 0) 34 if ((output_mask & (1 << i)) == 0)
34 continue; 35 continue;
35 36
36 const auto& output_register_map = g_state.regs.vs_output_attributes[index]; 37 const auto& output_register_map = regs.vs_output_attributes[index];
37 38
38 u32 semantics[4] = {output_register_map.map_x, output_register_map.map_y, 39 u32 semantics[4] = {output_register_map.map_x, output_register_map.map_y,
39 output_register_map.map_z, output_register_map.map_w}; 40 output_register_map.map_z, output_register_map.map_w};
@@ -41,7 +42,7 @@ OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) const {
41 for (unsigned comp = 0; comp < 4; ++comp) { 42 for (unsigned comp = 0; comp < 4; ++comp) {
42 float24* out = ((float24*)&ret) + semantics[comp]; 43 float24* out = ((float24*)&ret) + semantics[comp];
43 if (semantics[comp] != Regs::VSOutputAttributes::INVALID) { 44 if (semantics[comp] != Regs::VSOutputAttributes::INVALID) {
44 *out = value[i][comp]; 45 *out = output_regs[i][comp];
45 } else { 46 } else {
46 // Zero output so that attributes which aren't output won't have denormals in them, 47 // Zero output so that attributes which aren't output won't have denormals in them,
47 // which would slow us down later. 48 // which would slow us down later.