diff options
| author | 2018-12-21 18:47:22 -0300 | |
|---|---|---|
| committer | 2019-01-15 17:54:52 -0300 | |
| commit | fc46ecddb3bca4861babbf610cd64ab9fdc1bb08 (patch) | |
| tree | 6dbb61cb71db90909e801b6bfd52e4fbdadcf360 /src/video_core/shader/decode | |
| parent | shader_decode: Implement FFMA (diff) | |
| download | yuzu-fc46ecddb3bca4861babbf610cd64ab9fdc1bb08.tar.gz yuzu-fc46ecddb3bca4861babbf610cd64ab9fdc1bb08.tar.xz yuzu-fc46ecddb3bca4861babbf610cd64ab9fdc1bb08.zip | |
video_core: Return safe values after an assert hits
Diffstat (limited to 'src/video_core/shader/decode')
| -rw-r--r-- | src/video_core/shader/decode/arithmetic.cpp | 1 | ||||
| -rw-r--r-- | src/video_core/shader/decode/arithmetic_integer_immediate.cpp | 1 | ||||
| -rw-r--r-- | src/video_core/shader/decode/bfi.cpp | 1 | ||||
| -rw-r--r-- | src/video_core/shader/decode/conversion.cpp | 8 | ||||
| -rw-r--r-- | src/video_core/shader/decode/ffma.cpp | 1 | ||||
| -rw-r--r-- | src/video_core/shader/decode/xmad.cpp | 8 |
6 files changed, 12 insertions, 8 deletions
diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp index 9f8c27b3e..ef846bd9a 100644 --- a/src/video_core/shader/decode/arithmetic.cpp +++ b/src/video_core/shader/decode/arithmetic.cpp | |||
| @@ -115,6 +115,7 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) { | |||
| 115 | default: | 115 | default: |
| 116 | UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}", | 116 | UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}", |
| 117 | static_cast<unsigned>(instr.sub_op.Value())); | 117 | static_cast<unsigned>(instr.sub_op.Value())); |
| 118 | return Immediate(0); | ||
| 118 | } | 119 | } |
| 119 | }(); | 120 | }(); |
| 120 | value = GetSaturatedFloat(value, instr.alu.saturate_d); | 121 | value = GetSaturatedFloat(value, instr.alu.saturate_d); |
diff --git a/src/video_core/shader/decode/arithmetic_integer_immediate.cpp b/src/video_core/shader/decode/arithmetic_integer_immediate.cpp index ee5754161..57d9f54f7 100644 --- a/src/video_core/shader/decode/arithmetic_integer_immediate.cpp +++ b/src/video_core/shader/decode/arithmetic_integer_immediate.cpp | |||
| @@ -62,6 +62,7 @@ void ShaderIR::WriteLogicOperation(BasicBlock& bb, Register dest, LogicOperation | |||
| 62 | return op_b; | 62 | return op_b; |
| 63 | default: | 63 | default: |
| 64 | UNIMPLEMENTED_MSG("Unimplemented logic operation={}", static_cast<u32>(logic_op)); | 64 | UNIMPLEMENTED_MSG("Unimplemented logic operation={}", static_cast<u32>(logic_op)); |
| 65 | return Immediate(0); | ||
| 65 | } | 66 | } |
| 66 | }(); | 67 | }(); |
| 67 | 68 | ||
diff --git a/src/video_core/shader/decode/bfi.cpp b/src/video_core/shader/decode/bfi.cpp index 6a851b22e..a750aca30 100644 --- a/src/video_core/shader/decode/bfi.cpp +++ b/src/video_core/shader/decode/bfi.cpp | |||
| @@ -24,6 +24,7 @@ u32 ShaderIR::DecodeBfi(BasicBlock& bb, u32 pc) { | |||
| 24 | return {GetRegister(instr.gpr39), Immediate(instr.alu.GetSignedImm20_20())}; | 24 | return {GetRegister(instr.gpr39), Immediate(instr.alu.GetSignedImm20_20())}; |
| 25 | default: | 25 | default: |
| 26 | UNREACHABLE(); | 26 | UNREACHABLE(); |
| 27 | return {Immediate(0), Immediate(0)}; | ||
| 27 | } | 28 | } |
| 28 | }(); | 29 | }(); |
| 29 | const Node insert = GetRegister(instr.gpr8); | 30 | const Node insert = GetRegister(instr.gpr8); |
diff --git a/src/video_core/shader/decode/conversion.cpp b/src/video_core/shader/decode/conversion.cpp index ef46ab7a5..791f03fe0 100644 --- a/src/video_core/shader/decode/conversion.cpp +++ b/src/video_core/shader/decode/conversion.cpp | |||
| @@ -96,11 +96,10 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, u32 pc) { | |||
| 96 | return Operation(OperationCode::FCeil, PRECISE, value); | 96 | return Operation(OperationCode::FCeil, PRECISE, value); |
| 97 | case Tegra::Shader::F2fRoundingOp::Trunc: | 97 | case Tegra::Shader::F2fRoundingOp::Trunc: |
| 98 | return Operation(OperationCode::FTrunc, PRECISE, value); | 98 | return Operation(OperationCode::FTrunc, PRECISE, value); |
| 99 | default: | ||
| 100 | UNIMPLEMENTED_MSG("Unimplemented F2F rounding mode {}", | ||
| 101 | static_cast<u32>(instr.conversion.f2f.rounding.Value())); | ||
| 102 | break; | ||
| 103 | } | 99 | } |
| 100 | UNIMPLEMENTED_MSG("Unimplemented F2F rounding mode {}", | ||
| 101 | static_cast<u32>(instr.conversion.f2f.rounding.Value())); | ||
| 102 | return Immediate(0); | ||
| 104 | }(); | 103 | }(); |
| 105 | value = GetSaturatedFloat(value, instr.alu.saturate_d); | 104 | value = GetSaturatedFloat(value, instr.alu.saturate_d); |
| 106 | 105 | ||
| @@ -135,6 +134,7 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, u32 pc) { | |||
| 135 | default: | 134 | default: |
| 136 | UNIMPLEMENTED_MSG("Unimplemented F2I rounding mode {}", | 135 | UNIMPLEMENTED_MSG("Unimplemented F2I rounding mode {}", |
| 137 | static_cast<u32>(instr.conversion.f2i.rounding.Value())); | 136 | static_cast<u32>(instr.conversion.f2i.rounding.Value())); |
| 137 | return Immediate(0); | ||
| 138 | } | 138 | } |
| 139 | }(); | 139 | }(); |
| 140 | const bool is_signed = instr.conversion.is_output_signed; | 140 | const bool is_signed = instr.conversion.is_output_signed; |
diff --git a/src/video_core/shader/decode/ffma.cpp b/src/video_core/shader/decode/ffma.cpp index 0adc85476..a17ebd6db 100644 --- a/src/video_core/shader/decode/ffma.cpp +++ b/src/video_core/shader/decode/ffma.cpp | |||
| @@ -42,6 +42,7 @@ u32 ShaderIR::DecodeFfma(BasicBlock& bb, u32 pc) { | |||
| 42 | return {GetImmediate19(instr), GetRegister(instr.gpr39)}; | 42 | return {GetImmediate19(instr), GetRegister(instr.gpr39)}; |
| 43 | default: | 43 | default: |
| 44 | UNIMPLEMENTED_MSG("Unhandled FFMA instruction: {}", opcode->get().GetName()); | 44 | UNIMPLEMENTED_MSG("Unhandled FFMA instruction: {}", opcode->get().GetName()); |
| 45 | return {Immediate(0), Immediate(0)}; | ||
| 45 | } | 46 | } |
| 46 | }(); | 47 | }(); |
| 47 | 48 | ||
diff --git a/src/video_core/shader/decode/xmad.cpp b/src/video_core/shader/decode/xmad.cpp index 596f0ddc8..0466069ae 100644 --- a/src/video_core/shader/decode/xmad.cpp +++ b/src/video_core/shader/decode/xmad.cpp | |||
| @@ -42,9 +42,9 @@ u32 ShaderIR::DecodeXmad(BasicBlock& bb, u32 pc) { | |||
| 42 | case OpCode::Id::XMAD_IMM: | 42 | case OpCode::Id::XMAD_IMM: |
| 43 | return {instr.xmad.merge_37, Immediate(static_cast<u32>(instr.xmad.imm20_16)), | 43 | return {instr.xmad.merge_37, Immediate(static_cast<u32>(instr.xmad.imm20_16)), |
| 44 | GetRegister(instr.gpr39)}; | 44 | GetRegister(instr.gpr39)}; |
| 45 | default: | ||
| 46 | UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName()); | ||
| 47 | } | 45 | } |
| 46 | UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName()); | ||
| 47 | return {false, Immediate(0), Immediate(0)}; | ||
| 48 | }(); | 48 | }(); |
| 49 | 49 | ||
| 50 | if (instr.xmad.high_a) { | 50 | if (instr.xmad.high_a) { |
| @@ -85,9 +85,9 @@ u32 ShaderIR::DecodeXmad(BasicBlock& bb, u32 pc) { | |||
| 85 | NO_PRECISE, original_b, Immediate(16)); | 85 | NO_PRECISE, original_b, Immediate(16)); |
| 86 | return SignedOperation(OperationCode::IAdd, is_signed_c, NO_PRECISE, op_c, shifted_b); | 86 | return SignedOperation(OperationCode::IAdd, is_signed_c, NO_PRECISE, op_c, shifted_b); |
| 87 | } | 87 | } |
| 88 | default: { | 88 | default: |
| 89 | UNIMPLEMENTED_MSG("Unhandled XMAD mode: {}", static_cast<u32>(instr.xmad.mode.Value())); | 89 | UNIMPLEMENTED_MSG("Unhandled XMAD mode: {}", static_cast<u32>(instr.xmad.mode.Value())); |
| 90 | } | 90 | return Immediate(0); |
| 91 | } | 91 | } |
| 92 | }(); | 92 | }(); |
| 93 | 93 | ||