video_core: Remove unnecessary enum class casting in logging messages

fmt now automatically prints the numeric value of an enum class member
by default, so we don't need to use casts any more.

Reduces the line noise a bit.

9 files changed, 38 insertions, 48 deletions

diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp
index afef5948d..15eb700e7 100644
--- a/src/video_core/shader/decode/arithmetic.cpp
+++ b/src/video_core/shader/decode/arithmetic.cpp
@@ -110,8 +110,7 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
             case SubOp::Sqrt:
                 return Operation(OperationCode::FSqrt, PRECISE, op_a);
             default:
-                UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}",
-                                  static_cast<unsigned>(instr.sub_op.Value()));
+                UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}", instr.sub_op.Value());
                 return Immediate(0);
             }
         }();
diff --git a/src/video_core/shader/decode/arithmetic_integer.cpp b/src/video_core/shader/decode/arithmetic_integer.cpp
index f32c3134b..7b5bb7003 100644
--- a/src/video_core/shader/decode/arithmetic_integer.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer.cpp
@@ -83,7 +83,7 @@ u32 ShaderIR::DecodeArithmeticInteger(NodeBlock& bb, u32 pc) {
             case IAdd3Height::UpperHalfWord:
                 return BitfieldExtract(value, 16, 16);
             default:
-                UNIMPLEMENTED_MSG("Unhandled IADD3 height: {}", static_cast<u32>(height));
+                UNIMPLEMENTED_MSG("Unhandled IADD3 height: {}", height);
                 return Immediate(0);
             }
         };
diff --git a/src/video_core/shader/decode/arithmetic_integer_immediate.cpp b/src/video_core/shader/decode/arithmetic_integer_immediate.cpp
index 2a30aab2b..73580277a 100644
--- a/src/video_core/shader/decode/arithmetic_integer_immediate.cpp
+++ b/src/video_core/shader/decode/arithmetic_integer_immediate.cpp
@@ -72,7 +72,7 @@ void ShaderIR::WriteLogicOperation(NodeBlock& bb, Register dest, LogicOperation
         case LogicOperation::PassB:
             return op_b;
         default:
-            UNIMPLEMENTED_MSG("Unimplemented logic operation={}", static_cast<u32>(logic_op));
+            UNIMPLEMENTED_MSG("Unimplemented logic operation={}", logic_op);
             return Immediate(0);
         }
     }();
@@ -92,8 +92,7 @@ void ShaderIR::WriteLogicOperation(NodeBlock& bb, Register dest, LogicOperation
         break;
     }
     default:
-        UNIMPLEMENTED_MSG("Unimplemented predicate result mode: {}",
-                          static_cast<u32>(predicate_mode));
+        UNIMPLEMENTED_MSG("Unimplemented predicate result mode: {}", predicate_mode);
     }
 }
 
diff --git a/src/video_core/shader/decode/conversion.cpp b/src/video_core/shader/decode/conversion.cpp
index b9989c88c..fea7a54df 100644
--- a/src/video_core/shader/decode/conversion.cpp
+++ b/src/video_core/shader/decode/conversion.cpp
@@ -244,7 +244,7 @@ u32 ShaderIR::DecodeConversion(NodeBlock& bb, u32 pc) {
                 return Operation(OperationCode::FTrunc, value);
             default:
                 UNIMPLEMENTED_MSG("Unimplemented F2F rounding mode {}",
-                                  static_cast<u32>(instr.conversion.f2f.rounding.Value()));
+                                  instr.conversion.f2f.rounding.Value());
                 return value;
             }
         }();
@@ -300,7 +300,7 @@ u32 ShaderIR::DecodeConversion(NodeBlock& bb, u32 pc) {
                 return Operation(OperationCode::FTrunc, PRECISE, value);
             default:
                 UNIMPLEMENTED_MSG("Unimplemented F2I rounding mode {}",
-                                  static_cast<u32>(instr.conversion.f2i.rounding.Value()));
+                                  instr.conversion.f2i.rounding.Value());
                 return Immediate(0);
             }
         }();
diff --git a/src/video_core/shader/decode/memory.cpp b/src/video_core/shader/decode/memory.cpp
index e2bba88dd..50f4e7d35 100644
--- a/src/video_core/shader/decode/memory.cpp
+++ b/src/video_core/shader/decode/memory.cpp
@@ -47,7 +47,7 @@ OperationCode GetAtomOperation(AtomicOp op) {
     case AtomicOp::Exch:
         return OperationCode::AtomicIExchange;
     default:
-        UNIMPLEMENTED_MSG("op={}", static_cast<int>(op));
+        UNIMPLEMENTED_MSG("op={}", op);
         return OperationCode::AtomicIAdd;
     }
 }
@@ -83,7 +83,7 @@ u32 GetMemorySize(Tegra::Shader::UniformType uniform_type) {
     case Tegra::Shader::UniformType::UnsignedQuad:
         return 128;
     default:
-        UNIMPLEMENTED_MSG("Unimplemented size={}!", static_cast<u32>(uniform_type));
+        UNIMPLEMENTED_MSG("Unimplemented size={}!", uniform_type);
         return 32;
     }
 }
@@ -175,12 +175,12 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
             break;
         }
         default:
-            UNIMPLEMENTED_MSG("Unhandled type: {}", static_cast<unsigned>(instr.ld_c.type.Value()));
+            UNIMPLEMENTED_MSG("Unhandled type: {}", instr.ld_c.type.Value());
         }
         break;
     }
     case OpCode::Id::LD_L:
-        LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}", static_cast<u64>(instr.ld_l.unknown));
+        LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}", instr.ld_l.unknown);
         [[fallthrough]];
     case OpCode::Id::LD_S: {
         const auto GetAddress = [&](s32 offset) {
@@ -224,7 +224,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
         }
         default:
             UNIMPLEMENTED_MSG("{} Unhandled type: {}", opcode->get().GetName(),
-                              static_cast<u32>(instr.ldst_sl.type.Value()));
+                              instr.ldst_sl.type.Value());
         }
         break;
     }
@@ -306,8 +306,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
         break;
     }
     case OpCode::Id::ST_L:
-        LOG_DEBUG(HW_GPU, "ST_L cache management mode: {}",
-                  static_cast<u64>(instr.st_l.cache_management.Value()));
+        LOG_DEBUG(HW_GPU, "ST_L cache management mode: {}", instr.st_l.cache_management.Value());
         [[fallthrough]];
     case OpCode::Id::ST_S: {
         const auto GetAddress = [&](s32 offset) {
@@ -340,7 +339,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
         }
         default:
             UNIMPLEMENTED_MSG("{} unhandled type: {}", opcode->get().GetName(),
-                              static_cast<u32>(instr.ldst_sl.type.Value()));
+                              instr.ldst_sl.type.Value());
         }
         break;
     }
@@ -387,7 +386,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
     }
     case OpCode::Id::RED: {
         UNIMPLEMENTED_IF_MSG(instr.red.type != GlobalAtomicType::U32, "type={}",
-                             static_cast<int>(instr.red.type.Value()));
+                             instr.red.type.Value());
         const auto [real_address, base_address, descriptor] =
             TrackGlobalMemory(bb, instr, true, true);
         if (!real_address || !base_address) {
@@ -403,12 +402,12 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
         UNIMPLEMENTED_IF_MSG(instr.atom.operation == AtomicOp::Inc ||
                                  instr.atom.operation == AtomicOp::Dec ||
                                  instr.atom.operation == AtomicOp::SafeAdd,
-                             "operation={}", static_cast<int>(instr.atom.operation.Value()));
+                             "operation={}", instr.atom.operation.Value());
         UNIMPLEMENTED_IF_MSG(instr.atom.type == GlobalAtomicType::S64 ||
                                  instr.atom.type == GlobalAtomicType::U64 ||
                                  instr.atom.type == GlobalAtomicType::F16x2_FTZ_RN ||
                                  instr.atom.type == GlobalAtomicType::F32_FTZ_RN,
-                             "type={}", static_cast<int>(instr.atom.type.Value()));
+                             "type={}", instr.atom.type.Value());
 
         const auto [real_address, base_address, descriptor] =
             TrackGlobalMemory(bb, instr, true, true);
@@ -428,10 +427,10 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
     case OpCode::Id::ATOMS: {
         UNIMPLEMENTED_IF_MSG(instr.atoms.operation == AtomicOp::Inc ||
                                  instr.atoms.operation == AtomicOp::Dec,
-                             "operation={}", static_cast<int>(instr.atoms.operation.Value()));
+                             "operation={}", instr.atoms.operation.Value());
         UNIMPLEMENTED_IF_MSG(instr.atoms.type == AtomicType::S64 ||
                                  instr.atoms.type == AtomicType::U64,
-                             "type={}", static_cast<int>(instr.atoms.type.Value()));
+                             "type={}", instr.atoms.type.Value());
         const bool is_signed =
             instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
         const s32 offset = instr.atoms.GetImmediateOffset();
diff --git a/src/video_core/shader/decode/other.cpp b/src/video_core/shader/decode/other.cpp
index 1db500bc4..d3ea07aac 100644
--- a/src/video_core/shader/decode/other.cpp
+++ b/src/video_core/shader/decode/other.cpp
@@ -34,14 +34,13 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
         break;
     }
     case OpCode::Id::EXIT: {
-        const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
-        UNIMPLEMENTED_IF_MSG(cc != Tegra::Shader::ConditionCode::T, "EXIT condition code used: {}",
-                             static_cast<u32>(cc));
+        const ConditionCode cc = instr.flow_condition_code;
+        UNIMPLEMENTED_IF_MSG(cc != ConditionCode::T, "EXIT condition code used: {}", cc);
 
         switch (instr.flow.cond) {
         case Tegra::Shader::FlowCondition::Always:
             bb.push_back(Operation(OperationCode::Exit));
-            if (instr.pred.pred_index == static_cast<u64>(Tegra::Shader::Pred::UnusedIndex)) {
+            if (instr.pred.pred_index == static_cast<u64>(Pred::UnusedIndex)) {
                 // If this is an unconditional exit then just end processing here,
                 // otherwise we have to account for the possibility of the condition
                 // not being met, so continue processing the next instruction.
@@ -56,17 +55,15 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
             break;
 
         default:
-            UNIMPLEMENTED_MSG("Unhandled flow condition: {}",
-                              static_cast<u32>(instr.flow.cond.Value()));
+            UNIMPLEMENTED_MSG("Unhandled flow condition: {}", instr.flow.cond.Value());
         }
         break;
     }
     case OpCode::Id::KIL: {
         UNIMPLEMENTED_IF(instr.flow.cond != Tegra::Shader::FlowCondition::Always);
 
-        const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
-        UNIMPLEMENTED_IF_MSG(cc != Tegra::Shader::ConditionCode::T, "KIL condition code used: {}",
-                             static_cast<u32>(cc));
+        const ConditionCode cc = instr.flow_condition_code;
+        UNIMPLEMENTED_IF_MSG(cc != ConditionCode::T, "KIL condition code used: {}", cc);
 
         bb.push_back(Operation(OperationCode::Discard));
         break;
@@ -130,8 +127,7 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
                     return Immediate(0u);
                 }
             default:
-                UNIMPLEMENTED_MSG("Unhandled system move: {}",
-                                  static_cast<u32>(instr.sys20.Value()));
+                UNIMPLEMENTED_MSG("Unhandled system move: {}", instr.sys20.Value());
                 return Immediate(0u);
             }
         }();
@@ -181,8 +177,8 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
         }
         const Node branch = Operation(OperationCode::BranchIndirect, operand);
 
-        const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
-        if (cc != Tegra::Shader::ConditionCode::T) {
+        const ConditionCode cc = instr.flow_condition_code;
+        if (cc != ConditionCode::T) {
             bb.push_back(Conditional(GetConditionCode(cc), {branch}));
         } else {
             bb.push_back(branch);
@@ -218,9 +214,8 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
         break;
     }
     case OpCode::Id::SYNC: {
-        const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
-        UNIMPLEMENTED_IF_MSG(cc != Tegra::Shader::ConditionCode::T, "SYNC condition code used: {}",
-                             static_cast<u32>(cc));
+        const ConditionCode cc = instr.flow_condition_code;
+        UNIMPLEMENTED_IF_MSG(cc != ConditionCode::T, "SYNC condition code used: {}", cc);
 
         if (decompiled) {
             break;
@@ -231,9 +226,8 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
         break;
     }
     case OpCode::Id::BRK: {
-        const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
-        UNIMPLEMENTED_IF_MSG(cc != Tegra::Shader::ConditionCode::T, "BRK condition code used: {}",
-                             static_cast<u32>(cc));
+        const ConditionCode cc = instr.flow_condition_code;
+        UNIMPLEMENTED_IF_MSG(cc != ConditionCode::T, "BRK condition code used: {}", cc);
         if (decompiled) {
             break;
         }
@@ -306,7 +300,7 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
             case Tegra::Shader::MembarType::GL:
                 return OperationCode::MemoryBarrierGlobal;
             default:
-                UNIMPLEMENTED_MSG("MEMBAR type={}", static_cast<int>(instr.membar.type.Value()));
+                UNIMPLEMENTED_MSG("MEMBAR type={}", instr.membar.type.Value());
                 return OperationCode::MemoryBarrierGlobal;
             }
         }();
diff --git a/src/video_core/shader/decode/shift.cpp b/src/video_core/shader/decode/shift.cpp
index d4ffa8014..a53819c15 100644
--- a/src/video_core/shader/decode/shift.cpp
+++ b/src/video_core/shader/decode/shift.cpp
@@ -125,7 +125,7 @@ u32 ShaderIR::DecodeShift(NodeBlock& bb, u32 pc) {
     case OpCode::Id::SHF_LEFT_IMM: {
         UNIMPLEMENTED_IF(instr.generates_cc);
         UNIMPLEMENTED_IF_MSG(instr.shf.xmode != ShfXmode::None, "xmode={}",
-                             static_cast<int>(instr.shf.xmode.Value()));
+                             instr.shf.xmode.Value());
 
         if (instr.is_b_imm) {
             op_b = Immediate(static_cast<u32>(instr.shf.immediate));
diff --git a/src/video_core/shader/decode/texture.cpp b/src/video_core/shader/decode/texture.cpp
index 02fdccd86..fb18f631f 100644
--- a/src/video_core/shader/decode/texture.cpp
+++ b/src/video_core/shader/decode/texture.cpp
@@ -34,7 +34,7 @@ static std::size_t GetCoordCount(TextureType texture_type) {
     case TextureType::TextureCube:
         return 3;
     default:
-        UNIMPLEMENTED_MSG("Unhandled texture type: {}", static_cast<u32>(texture_type));
+        UNIMPLEMENTED_MSG("Unhandled texture type: {}", texture_type);
         return 0;
     }
 }
@@ -255,8 +255,7 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
             break;
         }
         default:
-            UNIMPLEMENTED_MSG("Unhandled texture query type: {}",
-                              static_cast<u32>(instr.txq.query_type.Value()));
+            UNIMPLEMENTED_MSG("Unhandled texture query type: {}", instr.txq.query_type.Value());
         }
         break;
     }
@@ -302,7 +301,7 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
             case TextureType::TextureCube:
                 return 3;
             default:
-                UNIMPLEMENTED_MSG("Unhandled texture type {}", static_cast<int>(texture_type));
+                UNIMPLEMENTED_MSG("Unhandled texture type {}", texture_type);
                 return 2;
             }
         }();
@@ -595,7 +594,7 @@ Node4 ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
         lod = GetRegister(instr.gpr20.Value() + bias_offset);
         break;
     default:
-        UNIMPLEMENTED_MSG("Unimplemented process mode={}", static_cast<u32>(process_mode));
+        UNIMPLEMENTED_MSG("Unimplemented process mode={}", process_mode);
         break;
     }
 
diff --git a/src/video_core/shader/decode/warp.cpp b/src/video_core/shader/decode/warp.cpp
index 11b77f795..37433d783 100644
--- a/src/video_core/shader/decode/warp.cpp
+++ b/src/video_core/shader/decode/warp.cpp
@@ -27,7 +27,7 @@ OperationCode GetOperationCode(VoteOperation vote_op) {
     case VoteOperation::Eq:
         return OperationCode::VoteEqual;
     default:
-        UNREACHABLE_MSG("Invalid vote operation={}", static_cast<u64>(vote_op));
+        UNREACHABLE_MSG("Invalid vote operation={}", vote_op);
         return OperationCode::VoteAll;
     }
 }