summaryrefslogtreecommitdiff
path: root/src/video_core/renderer_vulkan
diff options
context:
space:
mode:
authorGravatar Kelebek12022-08-12 10:58:09 +0100
committerGravatar Kelebek12022-10-07 14:13:45 +0100
commit752659aef3f16111981a097989dd7a5ddecff316 (patch)
tree775fbe8d1a478b2b8c201d86432743d4f3ddb2a4 /src/video_core/renderer_vulkan
parentMerge pull request #6142 from lat9nq/prog_meta_ref_bind_address (diff)
downloadyuzu-752659aef3f16111981a097989dd7a5ddecff316.tar.gz
yuzu-752659aef3f16111981a097989dd7a5ddecff316.tar.xz
yuzu-752659aef3f16111981a097989dd7a5ddecff316.zip
Update 3D regs
Diffstat (limited to 'src/video_core/renderer_vulkan')
-rw-r--r--src/video_core/renderer_vulkan/fixed_pipeline_state.cpp299
-rw-r--r--src/video_core/renderer_vulkan/fixed_pipeline_state.h15
-rw-r--r--src/video_core/renderer_vulkan/maxwell_to_vk.cpp337
-rw-r--r--src/video_core/renderer_vulkan/maxwell_to_vk.h2
-rw-r--r--src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp14
-rw-r--r--src/video_core/renderer_vulkan/vk_pipeline_cache.cpp67
-rw-r--r--src/video_core/renderer_vulkan/vk_rasterizer.cpp104
-rw-r--r--src/video_core/renderer_vulkan/vk_state_tracker.cpp58
8 files changed, 457 insertions, 439 deletions
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
index 733b454de..eb7c22fd5 100644
--- a/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
+++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.cpp
@@ -34,14 +34,15 @@ constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
34}; 34};
35 35
36void RefreshXfbState(VideoCommon::TransformFeedbackState& state, const Maxwell& regs) { 36void RefreshXfbState(VideoCommon::TransformFeedbackState& state, const Maxwell& regs) {
37 std::ranges::transform(regs.tfb_layouts, state.layouts.begin(), [](const auto& layout) { 37 std::ranges::transform(regs.transform_feedback.controls, state.layouts.begin(),
38 return VideoCommon::TransformFeedbackState::Layout{ 38 [](const auto& layout) {
39 .stream = layout.stream, 39 return VideoCommon::TransformFeedbackState::Layout{
40 .varying_count = layout.varying_count, 40 .stream = layout.stream,
41 .stride = layout.stride, 41 .varying_count = layout.varying_count,
42 }; 42 .stride = layout.stride,
43 }); 43 };
44 state.varyings = regs.tfb_varying_locs; 44 });
45 state.varyings = regs.stream_out_layout;
45} 46}
46} // Anonymous namespace 47} // Anonymous namespace
47 48
@@ -58,33 +59,34 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
58 raw1 = 0; 59 raw1 = 0;
59 extended_dynamic_state.Assign(has_extended_dynamic_state ? 1 : 0); 60 extended_dynamic_state.Assign(has_extended_dynamic_state ? 1 : 0);
60 dynamic_vertex_input.Assign(has_dynamic_vertex_input ? 1 : 0); 61 dynamic_vertex_input.Assign(has_dynamic_vertex_input ? 1 : 0);
61 xfb_enabled.Assign(regs.tfb_enabled != 0); 62 xfb_enabled.Assign(regs.transform_feedback_enabled != 0);
62 primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0); 63 primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
63 depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0); 64 depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
64 depth_clamp_disabled.Assign(regs.view_volume_clip_control.depth_clamp_disabled.Value()); 65 depth_clamp_disabled.Assign(regs.viewport_clip_control.geometry_clip ==
66 Maxwell::ViewportClipControl::GeometryClip::Passthrough);
65 ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0); 67 ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0);
66 polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front)); 68 polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front));
67 patch_control_points_minus_one.Assign(regs.patch_vertices - 1); 69 patch_control_points_minus_one.Assign(regs.patch_vertices - 1);
68 tessellation_primitive.Assign(static_cast<u32>(regs.tess_mode.prim.Value())); 70 tessellation_primitive.Assign(static_cast<u32>(regs.tessellation.params.domain_type.Value()));
69 tessellation_spacing.Assign(static_cast<u32>(regs.tess_mode.spacing.Value())); 71 tessellation_spacing.Assign(static_cast<u32>(regs.tessellation.params.spacing.Value()));
70 tessellation_clockwise.Assign(regs.tess_mode.cw.Value()); 72 tessellation_clockwise.Assign(regs.tessellation.params.output_primitives.Value() !=
73 Maxwell::Tessellation::OutputPrimitves::Triangles_CCW);
71 logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0); 74 logic_op_enable.Assign(regs.logic_op.enable != 0 ? 1 : 0);
72 logic_op.Assign(PackLogicOp(regs.logic_op.operation)); 75 logic_op.Assign(PackLogicOp(regs.logic_op.op));
73 topology.Assign(regs.draw.topology); 76 topology.Assign(regs.draw.topology);
74 msaa_mode.Assign(regs.multisample_mode); 77 msaa_mode.Assign(regs.anti_alias_samples_mode);
75 78
76 raw2 = 0; 79 raw2 = 0;
77 rasterize_enable.Assign(regs.rasterize_enable != 0 ? 1 : 0); 80 rasterize_enable.Assign(regs.rasterize_enable != 0 ? 1 : 0);
78 const auto test_func = 81 const auto test_func =
79 regs.alpha_test_enabled != 0 ? regs.alpha_test_func : Maxwell::ComparisonOp::Always; 82 regs.alpha_test_enabled != 0 ? regs.alpha_test_func : Maxwell::ComparisonOp::Always_GL;
80 alpha_test_func.Assign(PackComparisonOp(test_func)); 83 alpha_test_func.Assign(PackComparisonOp(test_func));
81 early_z.Assign(regs.force_early_fragment_tests != 0 ? 1 : 0); 84 early_z.Assign(regs.mandated_early_z != 0 ? 1 : 0);
82 depth_enabled.Assign(regs.zeta_enable != 0 ? 1 : 0); 85 depth_enabled.Assign(regs.zeta_enable != 0 ? 1 : 0);
83 depth_format.Assign(static_cast<u32>(regs.zeta.format)); 86 depth_format.Assign(static_cast<u32>(regs.zeta.format));
84 y_negate.Assign(regs.screen_y_control.y_negate != 0 ? 1 : 0); 87 y_negate.Assign(regs.window_origin.mode != Maxwell::WindowOrigin::Mode::UpperLeft ? 1 : 0);
85 provoking_vertex_last.Assign(regs.provoking_vertex_last != 0 ? 1 : 0); 88 provoking_vertex_last.Assign(regs.provoking_vertex == Maxwell::ProvokingVertex::Last ? 1 : 0);
86 conservative_raster_enable.Assign(regs.conservative_raster_enable != 0 ? 1 : 0); 89 smooth_lines.Assign(regs.line_anti_alias_enable != 0 ? 1 : 0);
87 smooth_lines.Assign(regs.line_smooth_enable != 0 ? 1 : 0);
88 90
89 for (size_t i = 0; i < regs.rt.size(); ++i) { 91 for (size_t i = 0; i < regs.rt.size(); ++i) {
90 color_formats[i] = static_cast<u8>(regs.rt[i].format); 92 color_formats[i] = static_cast<u8>(regs.rt[i].format);
@@ -116,8 +118,8 @@ void FixedPipelineState::Refresh(Tegra::Engines::Maxwell3D& maxwell3d,
116 maxwell3d.dirty.flags[Dirty::VertexInput] = false; 118 maxwell3d.dirty.flags[Dirty::VertexInput] = false;
117 enabled_divisors = 0; 119 enabled_divisors = 0;
118 for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) { 120 for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
119 const bool is_enabled = regs.instanced_arrays.IsInstancingEnabled(index); 121 const bool is_enabled = regs.vertex_stream_instances.IsInstancingEnabled(index);
120 binding_divisors[index] = is_enabled ? regs.vertex_array[index].divisor : 0; 122 binding_divisors[index] = is_enabled ? regs.vertex_streams[index].frequency : 0;
121 enabled_divisors |= (is_enabled ? u64{1} : 0) << index; 123 enabled_divisors |= (is_enabled ? u64{1} : 0) << index;
122 } 124 }
123 for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) { 125 for (size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
@@ -164,17 +166,17 @@ void FixedPipelineState::BlendingAttachment::Refresh(const Maxwell& regs, size_t
164 166
165 // TODO: C++20 Use templated lambda to deduplicate code 167 // TODO: C++20 Use templated lambda to deduplicate code
166 168
167 if (!regs.independent_blend_enable) { 169 if (!regs.blend_per_target_enabled) {
168 const auto& src = regs.blend; 170 if (!regs.blend.enable[index]) {
169 if (!src.enable[index]) {
170 return; 171 return;
171 } 172 }
172 equation_rgb.Assign(PackBlendEquation(src.equation_rgb)); 173 const auto& src = regs.blend;
173 equation_a.Assign(PackBlendEquation(src.equation_a)); 174 equation_rgb.Assign(PackBlendEquation(src.color_op));
174 factor_source_rgb.Assign(PackBlendFactor(src.factor_source_rgb)); 175 equation_a.Assign(PackBlendEquation(src.alpha_op));
175 factor_dest_rgb.Assign(PackBlendFactor(src.factor_dest_rgb)); 176 factor_source_rgb.Assign(PackBlendFactor(src.color_source));
176 factor_source_a.Assign(PackBlendFactor(src.factor_source_a)); 177 factor_dest_rgb.Assign(PackBlendFactor(src.color_dest));
177 factor_dest_a.Assign(PackBlendFactor(src.factor_dest_a)); 178 factor_source_a.Assign(PackBlendFactor(src.alpha_source));
179 factor_dest_a.Assign(PackBlendFactor(src.alpha_dest));
178 enable.Assign(1); 180 enable.Assign(1);
179 return; 181 return;
180 } 182 }
@@ -182,34 +184,34 @@ void FixedPipelineState::BlendingAttachment::Refresh(const Maxwell& regs, size_t
182 if (!regs.blend.enable[index]) { 184 if (!regs.blend.enable[index]) {
183 return; 185 return;
184 } 186 }
185 const auto& src = regs.independent_blend[index]; 187 const auto& src = regs.blend_per_target[index];
186 equation_rgb.Assign(PackBlendEquation(src.equation_rgb)); 188 equation_rgb.Assign(PackBlendEquation(src.color_op));
187 equation_a.Assign(PackBlendEquation(src.equation_a)); 189 equation_a.Assign(PackBlendEquation(src.alpha_op));
188 factor_source_rgb.Assign(PackBlendFactor(src.factor_source_rgb)); 190 factor_source_rgb.Assign(PackBlendFactor(src.color_source));
189 factor_dest_rgb.Assign(PackBlendFactor(src.factor_dest_rgb)); 191 factor_dest_rgb.Assign(PackBlendFactor(src.color_dest));
190 factor_source_a.Assign(PackBlendFactor(src.factor_source_a)); 192 factor_source_a.Assign(PackBlendFactor(src.alpha_source));
191 factor_dest_a.Assign(PackBlendFactor(src.factor_dest_a)); 193 factor_dest_a.Assign(PackBlendFactor(src.alpha_dest));
192 enable.Assign(1); 194 enable.Assign(1);
193} 195}
194 196
195void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) { 197void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) {
196 u32 packed_front_face = PackFrontFace(regs.front_face); 198 u32 packed_front_face = PackFrontFace(regs.gl_front_face);
197 if (regs.screen_y_control.triangle_rast_flip != 0) { 199 if (regs.window_origin.flip_y != 0) {
198 // Flip front face 200 // Flip front face
199 packed_front_face = 1 - packed_front_face; 201 packed_front_face = 1 - packed_front_face;
200 } 202 }
201 203
202 raw1 = 0; 204 raw1 = 0;
203 raw2 = 0; 205 raw2 = 0;
204 front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op_fail)); 206 front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op.fail));
205 front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op_zfail)); 207 front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op.zfail));
206 front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op_zpass)); 208 front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op.zpass));
207 front.test_func.Assign(PackComparisonOp(regs.stencil_front_func_func)); 209 front.test_func.Assign(PackComparisonOp(regs.stencil_front_op.func));
208 if (regs.stencil_two_side_enable) { 210 if (regs.stencil_two_side_enable) {
209 back.action_stencil_fail.Assign(PackStencilOp(regs.stencil_back_op_fail)); 211 back.action_stencil_fail.Assign(PackStencilOp(regs.stencil_back_op.fail));
210 back.action_depth_fail.Assign(PackStencilOp(regs.stencil_back_op_zfail)); 212 back.action_depth_fail.Assign(PackStencilOp(regs.stencil_back_op.zfail));
211 back.action_depth_pass.Assign(PackStencilOp(regs.stencil_back_op_zpass)); 213 back.action_depth_pass.Assign(PackStencilOp(regs.stencil_back_op.zpass));
212 back.test_func.Assign(PackComparisonOp(regs.stencil_back_func_func)); 214 back.test_func.Assign(PackComparisonOp(regs.stencil_back_op.func));
213 } else { 215 } else {
214 back.action_stencil_fail.Assign(front.action_stencil_fail); 216 back.action_stencil_fail.Assign(front.action_stencil_fail);
215 back.action_depth_fail.Assign(front.action_depth_fail); 217 back.action_depth_fail.Assign(front.action_depth_fail);
@@ -222,9 +224,9 @@ void FixedPipelineState::DynamicState::Refresh(const Maxwell& regs) {
222 depth_test_enable.Assign(regs.depth_test_enable); 224 depth_test_enable.Assign(regs.depth_test_enable);
223 front_face.Assign(packed_front_face); 225 front_face.Assign(packed_front_face);
224 depth_test_func.Assign(PackComparisonOp(regs.depth_test_func)); 226 depth_test_func.Assign(PackComparisonOp(regs.depth_test_func));
225 cull_face.Assign(PackCullFace(regs.cull_face)); 227 cull_face.Assign(PackCullFace(regs.gl_cull_face));
226 cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0); 228 cull_enable.Assign(regs.gl_cull_test_enabled != 0 ? 1 : 0);
227 std::ranges::transform(regs.vertex_array, vertex_strides.begin(), [](const auto& array) { 229 std::ranges::transform(regs.vertex_streams, vertex_strides.begin(), [](const auto& array) {
228 return static_cast<u16>(array.stride.Value()); 230 return static_cast<u16>(array.stride.Value());
229 }); 231 });
230} 232}
@@ -251,41 +253,42 @@ Maxwell::ComparisonOp FixedPipelineState::UnpackComparisonOp(u32 packed) noexcep
251 return static_cast<Maxwell::ComparisonOp>(packed + 1); 253 return static_cast<Maxwell::ComparisonOp>(packed + 1);
252} 254}
253 255
254u32 FixedPipelineState::PackStencilOp(Maxwell::StencilOp op) noexcept { 256u32 FixedPipelineState::PackStencilOp(Maxwell::StencilOp::Op op) noexcept {
255 switch (op) { 257 switch (op) {
256 case Maxwell::StencilOp::Keep: 258 case Maxwell::StencilOp::Op::Keep_D3D:
257 case Maxwell::StencilOp::KeepOGL: 259 case Maxwell::StencilOp::Op::Keep_GL:
258 return 0; 260 return 0;
259 case Maxwell::StencilOp::Zero: 261 case Maxwell::StencilOp::Op::Zero_D3D:
260 case Maxwell::StencilOp::ZeroOGL: 262 case Maxwell::StencilOp::Op::Zero_GL:
261 return 1; 263 return 1;
262 case Maxwell::StencilOp::Replace: 264 case Maxwell::StencilOp::Op::Replace_D3D:
263 case Maxwell::StencilOp::ReplaceOGL: 265 case Maxwell::StencilOp::Op::Replace_GL:
264 return 2; 266 return 2;
265 case Maxwell::StencilOp::Incr: 267 case Maxwell::StencilOp::Op::IncrSaturate_D3D:
266 case Maxwell::StencilOp::IncrOGL: 268 case Maxwell::StencilOp::Op::IncrSaturate_GL:
267 return 3; 269 return 3;
268 case Maxwell::StencilOp::Decr: 270 case Maxwell::StencilOp::Op::DecrSaturate_D3D:
269 case Maxwell::StencilOp::DecrOGL: 271 case Maxwell::StencilOp::Op::DecrSaturate_GL:
270 return 4; 272 return 4;
271 case Maxwell::StencilOp::Invert: 273 case Maxwell::StencilOp::Op::Invert_D3D:
272 case Maxwell::StencilOp::InvertOGL: 274 case Maxwell::StencilOp::Op::Invert_GL:
273 return 5; 275 return 5;
274 case Maxwell::StencilOp::IncrWrap: 276 case Maxwell::StencilOp::Op::Incr_D3D:
275 case Maxwell::StencilOp::IncrWrapOGL: 277 case Maxwell::StencilOp::Op::Incr_GL:
276 return 6; 278 return 6;
277 case Maxwell::StencilOp::DecrWrap: 279 case Maxwell::StencilOp::Op::Decr_D3D:
278 case Maxwell::StencilOp::DecrWrapOGL: 280 case Maxwell::StencilOp::Op::Decr_GL:
279 return 7; 281 return 7;
280 } 282 }
281 return 0; 283 return 0;
282} 284}
283 285
284Maxwell::StencilOp FixedPipelineState::UnpackStencilOp(u32 packed) noexcept { 286Maxwell::StencilOp::Op FixedPipelineState::UnpackStencilOp(u32 packed) noexcept {
285 static constexpr std::array LUT = {Maxwell::StencilOp::Keep, Maxwell::StencilOp::Zero, 287 static constexpr std::array LUT = {
286 Maxwell::StencilOp::Replace, Maxwell::StencilOp::Incr, 288 Maxwell::StencilOp::Op::Keep_D3D, Maxwell::StencilOp::Op::Zero_D3D,
287 Maxwell::StencilOp::Decr, Maxwell::StencilOp::Invert, 289 Maxwell::StencilOp::Op::Replace_D3D, Maxwell::StencilOp::Op::IncrSaturate_D3D,
288 Maxwell::StencilOp::IncrWrap, Maxwell::StencilOp::DecrWrap}; 290 Maxwell::StencilOp::Op::DecrSaturate_D3D, Maxwell::StencilOp::Op::Invert_D3D,
291 Maxwell::StencilOp::Op::Incr_D3D, Maxwell::StencilOp::Op::Decr_D3D};
289 return LUT[packed]; 292 return LUT[packed];
290} 293}
291 294
@@ -318,30 +321,30 @@ Maxwell::PolygonMode FixedPipelineState::UnpackPolygonMode(u32 packed) noexcept
318 return static_cast<Maxwell::PolygonMode>(packed + 0x1B00); 321 return static_cast<Maxwell::PolygonMode>(packed + 0x1B00);
319} 322}
320 323
321u32 FixedPipelineState::PackLogicOp(Maxwell::LogicOperation op) noexcept { 324u32 FixedPipelineState::PackLogicOp(Maxwell::LogicOp::Op op) noexcept {
322 return static_cast<u32>(op) - 0x1500; 325 return static_cast<u32>(op) - 0x1500;
323} 326}
324 327
325Maxwell::LogicOperation FixedPipelineState::UnpackLogicOp(u32 packed) noexcept { 328Maxwell::LogicOp::Op FixedPipelineState::UnpackLogicOp(u32 packed) noexcept {
326 return static_cast<Maxwell::LogicOperation>(packed + 0x1500); 329 return static_cast<Maxwell::LogicOp::Op>(packed + 0x1500);
327} 330}
328 331
329u32 FixedPipelineState::PackBlendEquation(Maxwell::Blend::Equation equation) noexcept { 332u32 FixedPipelineState::PackBlendEquation(Maxwell::Blend::Equation equation) noexcept {
330 switch (equation) { 333 switch (equation) {
331 case Maxwell::Blend::Equation::Add: 334 case Maxwell::Blend::Equation::Add_D3D:
332 case Maxwell::Blend::Equation::AddGL: 335 case Maxwell::Blend::Equation::Add_GL:
333 return 0; 336 return 0;
334 case Maxwell::Blend::Equation::Subtract: 337 case Maxwell::Blend::Equation::Subtract_D3D:
335 case Maxwell::Blend::Equation::SubtractGL: 338 case Maxwell::Blend::Equation::Subtract_GL:
336 return 1; 339 return 1;
337 case Maxwell::Blend::Equation::ReverseSubtract: 340 case Maxwell::Blend::Equation::ReverseSubtract_D3D:
338 case Maxwell::Blend::Equation::ReverseSubtractGL: 341 case Maxwell::Blend::Equation::ReverseSubtract_GL:
339 return 2; 342 return 2;
340 case Maxwell::Blend::Equation::Min: 343 case Maxwell::Blend::Equation::Min_D3D:
341 case Maxwell::Blend::Equation::MinGL: 344 case Maxwell::Blend::Equation::Min_GL:
342 return 3; 345 return 3;
343 case Maxwell::Blend::Equation::Max: 346 case Maxwell::Blend::Equation::Max_D3D:
344 case Maxwell::Blend::Equation::MaxGL: 347 case Maxwell::Blend::Equation::Max_GL:
345 return 4; 348 return 4;
346 } 349 }
347 return 0; 350 return 0;
@@ -349,97 +352,99 @@ u32 FixedPipelineState::PackBlendEquation(Maxwell::Blend::Equation equation) noe
349 352
350Maxwell::Blend::Equation FixedPipelineState::UnpackBlendEquation(u32 packed) noexcept { 353Maxwell::Blend::Equation FixedPipelineState::UnpackBlendEquation(u32 packed) noexcept {
351 static constexpr std::array LUT = { 354 static constexpr std::array LUT = {
352 Maxwell::Blend::Equation::Add, Maxwell::Blend::Equation::Subtract, 355 Maxwell::Blend::Equation::Add_D3D, Maxwell::Blend::Equation::Subtract_D3D,
353 Maxwell::Blend::Equation::ReverseSubtract, Maxwell::Blend::Equation::Min, 356 Maxwell::Blend::Equation::ReverseSubtract_D3D, Maxwell::Blend::Equation::Min_D3D,
354 Maxwell::Blend::Equation::Max}; 357 Maxwell::Blend::Equation::Max_D3D};
355 return LUT[packed]; 358 return LUT[packed];
356} 359}
357 360
358u32 FixedPipelineState::PackBlendFactor(Maxwell::Blend::Factor factor) noexcept { 361u32 FixedPipelineState::PackBlendFactor(Maxwell::Blend::Factor factor) noexcept {
359 switch (factor) { 362 switch (factor) {
360 case Maxwell::Blend::Factor::Zero: 363 case Maxwell::Blend::Factor::Zero_D3D:
361 case Maxwell::Blend::Factor::ZeroGL: 364 case Maxwell::Blend::Factor::Zero_GL:
362 return 0; 365 return 0;
363 case Maxwell::Blend::Factor::One: 366 case Maxwell::Blend::Factor::One_D3D:
364 case Maxwell::Blend::Factor::OneGL: 367 case Maxwell::Blend::Factor::One_GL:
365 return 1; 368 return 1;
366 case Maxwell::Blend::Factor::SourceColor: 369 case Maxwell::Blend::Factor::SourceColor_D3D:
367 case Maxwell::Blend::Factor::SourceColorGL: 370 case Maxwell::Blend::Factor::SourceColor_GL:
368 return 2; 371 return 2;
369 case Maxwell::Blend::Factor::OneMinusSourceColor: 372 case Maxwell::Blend::Factor::OneMinusSourceColor_D3D:
370 case Maxwell::Blend::Factor::OneMinusSourceColorGL: 373 case Maxwell::Blend::Factor::OneMinusSourceColor_GL:
371 return 3; 374 return 3;
372 case Maxwell::Blend::Factor::SourceAlpha: 375 case Maxwell::Blend::Factor::SourceAlpha_D3D:
373 case Maxwell::Blend::Factor::SourceAlphaGL: 376 case Maxwell::Blend::Factor::SourceAlpha_GL:
374 return 4; 377 return 4;
375 case Maxwell::Blend::Factor::OneMinusSourceAlpha: 378 case Maxwell::Blend::Factor::OneMinusSourceAlpha_D3D:
376 case Maxwell::Blend::Factor::OneMinusSourceAlphaGL: 379 case Maxwell::Blend::Factor::OneMinusSourceAlpha_GL:
377 return 5; 380 return 5;
378 case Maxwell::Blend::Factor::DestAlpha: 381 case Maxwell::Blend::Factor::DestAlpha_D3D:
379 case Maxwell::Blend::Factor::DestAlphaGL: 382 case Maxwell::Blend::Factor::DestAlpha_GL:
380 return 6; 383 return 6;
381 case Maxwell::Blend::Factor::OneMinusDestAlpha: 384 case Maxwell::Blend::Factor::OneMinusDestAlpha_D3D:
382 case Maxwell::Blend::Factor::OneMinusDestAlphaGL: 385 case Maxwell::Blend::Factor::OneMinusDestAlpha_GL:
383 return 7; 386 return 7;
384 case Maxwell::Blend::Factor::DestColor: 387 case Maxwell::Blend::Factor::DestColor_D3D:
385 case Maxwell::Blend::Factor::DestColorGL: 388 case Maxwell::Blend::Factor::DestColor_GL:
386 return 8; 389 return 8;
387 case Maxwell::Blend::Factor::OneMinusDestColor: 390 case Maxwell::Blend::Factor::OneMinusDestColor_D3D:
388 case Maxwell::Blend::Factor::OneMinusDestColorGL: 391 case Maxwell::Blend::Factor::OneMinusDestColor_GL:
389 return 9; 392 return 9;
390 case Maxwell::Blend::Factor::SourceAlphaSaturate: 393 case Maxwell::Blend::Factor::SourceAlphaSaturate_D3D:
391 case Maxwell::Blend::Factor::SourceAlphaSaturateGL: 394 case Maxwell::Blend::Factor::SourceAlphaSaturate_GL:
392 return 10; 395 return 10;
393 case Maxwell::Blend::Factor::Source1Color: 396 case Maxwell::Blend::Factor::Source1Color_D3D:
394 case Maxwell::Blend::Factor::Source1ColorGL: 397 case Maxwell::Blend::Factor::Source1Color_GL:
395 return 11; 398 return 11;
396 case Maxwell::Blend::Factor::OneMinusSource1Color: 399 case Maxwell::Blend::Factor::OneMinusSource1Color_D3D:
397 case Maxwell::Blend::Factor::OneMinusSource1ColorGL: 400 case Maxwell::Blend::Factor::OneMinusSource1Color_GL:
398 return 12; 401 return 12;
399 case Maxwell::Blend::Factor::Source1Alpha: 402 case Maxwell::Blend::Factor::Source1Alpha_D3D:
400 case Maxwell::Blend::Factor::Source1AlphaGL: 403 case Maxwell::Blend::Factor::Source1Alpha_GL:
401 return 13; 404 return 13;
402 case Maxwell::Blend::Factor::OneMinusSource1Alpha: 405 case Maxwell::Blend::Factor::OneMinusSource1Alpha_D3D:
403 case Maxwell::Blend::Factor::OneMinusSource1AlphaGL: 406 case Maxwell::Blend::Factor::OneMinusSource1Alpha_GL:
404 return 14; 407 return 14;
405 case Maxwell::Blend::Factor::ConstantColor: 408 case Maxwell::Blend::Factor::BlendFactor_D3D:
406 case Maxwell::Blend::Factor::ConstantColorGL: 409 case Maxwell::Blend::Factor::ConstantColor_GL:
407 return 15; 410 return 15;
408 case Maxwell::Blend::Factor::OneMinusConstantColor: 411 case Maxwell::Blend::Factor::OneMinusBlendFactor_D3D:
409 case Maxwell::Blend::Factor::OneMinusConstantColorGL: 412 case Maxwell::Blend::Factor::OneMinusConstantColor_GL:
410 return 16; 413 return 16;
411 case Maxwell::Blend::Factor::ConstantAlpha: 414 case Maxwell::Blend::Factor::BothSourceAlpha_D3D:
412 case Maxwell::Blend::Factor::ConstantAlphaGL: 415 case Maxwell::Blend::Factor::ConstantAlpha_GL:
413 return 17; 416 return 17;
414 case Maxwell::Blend::Factor::OneMinusConstantAlpha: 417 case Maxwell::Blend::Factor::OneMinusBothSourceAlpha_D3D:
415 case Maxwell::Blend::Factor::OneMinusConstantAlphaGL: 418 case Maxwell::Blend::Factor::OneMinusConstantAlpha_GL:
416 return 18; 419 return 18;
417 } 420 }
421 UNIMPLEMENTED_MSG("Unknown blend factor {}", static_cast<u32>(factor));
418 return 0; 422 return 0;
419} 423}
420 424
421Maxwell::Blend::Factor FixedPipelineState::UnpackBlendFactor(u32 packed) noexcept { 425Maxwell::Blend::Factor FixedPipelineState::UnpackBlendFactor(u32 packed) noexcept {
422 static constexpr std::array LUT = { 426 static constexpr std::array LUT = {
423 Maxwell::Blend::Factor::Zero, 427 Maxwell::Blend::Factor::Zero_D3D,
424 Maxwell::Blend::Factor::One, 428 Maxwell::Blend::Factor::One_D3D,
425 Maxwell::Blend::Factor::SourceColor, 429 Maxwell::Blend::Factor::SourceColor_D3D,
426 Maxwell::Blend::Factor::OneMinusSourceColor, 430 Maxwell::Blend::Factor::OneMinusSourceColor_D3D,
427 Maxwell::Blend::Factor::SourceAlpha, 431 Maxwell::Blend::Factor::SourceAlpha_D3D,
428 Maxwell::Blend::Factor::OneMinusSourceAlpha, 432 Maxwell::Blend::Factor::OneMinusSourceAlpha_D3D,
429 Maxwell::Blend::Factor::DestAlpha, 433 Maxwell::Blend::Factor::DestAlpha_D3D,
430 Maxwell::Blend::Factor::OneMinusDestAlpha, 434 Maxwell::Blend::Factor::OneMinusDestAlpha_D3D,
431 Maxwell::Blend::Factor::DestColor, 435 Maxwell::Blend::Factor::DestColor_D3D,
432 Maxwell::Blend::Factor::OneMinusDestColor, 436 Maxwell::Blend::Factor::OneMinusDestColor_D3D,
433 Maxwell::Blend::Factor::SourceAlphaSaturate, 437 Maxwell::Blend::Factor::SourceAlphaSaturate_D3D,
434 Maxwell::Blend::Factor::Source1Color, 438 Maxwell::Blend::Factor::Source1Color_D3D,
435 Maxwell::Blend::Factor::OneMinusSource1Color, 439 Maxwell::Blend::Factor::OneMinusSource1Color_D3D,
436 Maxwell::Blend::Factor::Source1Alpha, 440 Maxwell::Blend::Factor::Source1Alpha_D3D,
437 Maxwell::Blend::Factor::OneMinusSource1Alpha, 441 Maxwell::Blend::Factor::OneMinusSource1Alpha_D3D,
438 Maxwell::Blend::Factor::ConstantColor, 442 Maxwell::Blend::Factor::BlendFactor_D3D,
439 Maxwell::Blend::Factor::OneMinusConstantColor, 443 Maxwell::Blend::Factor::OneMinusBlendFactor_D3D,
440 Maxwell::Blend::Factor::ConstantAlpha, 444 Maxwell::Blend::Factor::BothSourceAlpha_D3D,
441 Maxwell::Blend::Factor::OneMinusConstantAlpha, 445 Maxwell::Blend::Factor::OneMinusBothSourceAlpha_D3D,
442 }; 446 };
447 ASSERT(packed < LUT.size());
443 return LUT[packed]; 448 return LUT[packed];
444} 449}
445 450
diff --git a/src/video_core/renderer_vulkan/fixed_pipeline_state.h b/src/video_core/renderer_vulkan/fixed_pipeline_state.h
index 9d60756e5..43441209c 100644
--- a/src/video_core/renderer_vulkan/fixed_pipeline_state.h
+++ b/src/video_core/renderer_vulkan/fixed_pipeline_state.h
@@ -21,8 +21,8 @@ struct FixedPipelineState {
21 static u32 PackComparisonOp(Maxwell::ComparisonOp op) noexcept; 21 static u32 PackComparisonOp(Maxwell::ComparisonOp op) noexcept;
22 static Maxwell::ComparisonOp UnpackComparisonOp(u32 packed) noexcept; 22 static Maxwell::ComparisonOp UnpackComparisonOp(u32 packed) noexcept;
23 23
24 static u32 PackStencilOp(Maxwell::StencilOp op) noexcept; 24 static u32 PackStencilOp(Maxwell::StencilOp::Op op) noexcept;
25 static Maxwell::StencilOp UnpackStencilOp(u32 packed) noexcept; 25 static Maxwell::StencilOp::Op UnpackStencilOp(u32 packed) noexcept;
26 26
27 static u32 PackCullFace(Maxwell::CullFace cull) noexcept; 27 static u32 PackCullFace(Maxwell::CullFace cull) noexcept;
28 static Maxwell::CullFace UnpackCullFace(u32 packed) noexcept; 28 static Maxwell::CullFace UnpackCullFace(u32 packed) noexcept;
@@ -33,8 +33,8 @@ struct FixedPipelineState {
33 static u32 PackPolygonMode(Maxwell::PolygonMode mode) noexcept; 33 static u32 PackPolygonMode(Maxwell::PolygonMode mode) noexcept;
34 static Maxwell::PolygonMode UnpackPolygonMode(u32 packed) noexcept; 34 static Maxwell::PolygonMode UnpackPolygonMode(u32 packed) noexcept;
35 35
36 static u32 PackLogicOp(Maxwell::LogicOperation op) noexcept; 36 static u32 PackLogicOp(Maxwell::LogicOp::Op op) noexcept;
37 static Maxwell::LogicOperation UnpackLogicOp(u32 packed) noexcept; 37 static Maxwell::LogicOp::Op UnpackLogicOp(u32 packed) noexcept;
38 38
39 static u32 PackBlendEquation(Maxwell::Blend::Equation equation) noexcept; 39 static u32 PackBlendEquation(Maxwell::Blend::Equation equation) noexcept;
40 static Maxwell::Blend::Equation UnpackBlendEquation(u32 packed) noexcept; 40 static Maxwell::Blend::Equation UnpackBlendEquation(u32 packed) noexcept;
@@ -113,15 +113,15 @@ struct FixedPipelineState {
113 BitField<Position + 6, 3, u32> action_depth_pass; 113 BitField<Position + 6, 3, u32> action_depth_pass;
114 BitField<Position + 9, 3, u32> test_func; 114 BitField<Position + 9, 3, u32> test_func;
115 115
116 Maxwell::StencilOp ActionStencilFail() const noexcept { 116 Maxwell::StencilOp::Op ActionStencilFail() const noexcept {
117 return UnpackStencilOp(action_stencil_fail); 117 return UnpackStencilOp(action_stencil_fail);
118 } 118 }
119 119
120 Maxwell::StencilOp ActionDepthFail() const noexcept { 120 Maxwell::StencilOp::Op ActionDepthFail() const noexcept {
121 return UnpackStencilOp(action_depth_fail); 121 return UnpackStencilOp(action_depth_fail);
122 } 122 }
123 123
124 Maxwell::StencilOp ActionDepthPass() const noexcept { 124 Maxwell::StencilOp::Op ActionDepthPass() const noexcept {
125 return UnpackStencilOp(action_depth_pass); 125 return UnpackStencilOp(action_depth_pass);
126 } 126 }
127 127
@@ -193,7 +193,6 @@ struct FixedPipelineState {
193 BitField<6, 5, u32> depth_format; 193 BitField<6, 5, u32> depth_format;
194 BitField<11, 1, u32> y_negate; 194 BitField<11, 1, u32> y_negate;
195 BitField<12, 1, u32> provoking_vertex_last; 195 BitField<12, 1, u32> provoking_vertex_last;
196 BitField<13, 1, u32> conservative_raster_enable;
197 BitField<14, 1, u32> smooth_lines; 196 BitField<14, 1, u32> smooth_lines;
198 }; 197 };
199 std::array<u8, Maxwell::NumRenderTargets> color_formats; 198 std::array<u8, Maxwell::NumRenderTargets> color_formats;
diff --git a/src/video_core/renderer_vulkan/maxwell_to_vk.cpp b/src/video_core/renderer_vulkan/maxwell_to_vk.cpp
index e7104d377..5c156087b 100644
--- a/src/video_core/renderer_vulkan/maxwell_to_vk.cpp
+++ b/src/video_core/renderer_vulkan/maxwell_to_vk.cpp
@@ -323,161 +323,182 @@ VkFormat VertexFormat(const Device& device, Maxwell::VertexAttribute::Type type,
323 Maxwell::VertexAttribute::Size size) { 323 Maxwell::VertexAttribute::Size size) {
324 const VkFormat format{([&]() { 324 const VkFormat format{([&]() {
325 switch (type) { 325 switch (type) {
326 case Maxwell::VertexAttribute::Type::UnsignedNorm: 326 case Maxwell::VertexAttribute::Type::UnusedEnumDoNotUseBecauseItWillGoAway:
327 ASSERT_MSG(false, "Invalid vertex attribute type!");
328 break;
329 case Maxwell::VertexAttribute::Type::UNorm:
327 switch (size) { 330 switch (size) {
328 case Maxwell::VertexAttribute::Size::Size_8: 331 case Maxwell::VertexAttribute::Size::Size_R8:
332 case Maxwell::VertexAttribute::Size::Size_A8:
329 return VK_FORMAT_R8_UNORM; 333 return VK_FORMAT_R8_UNORM;
330 case Maxwell::VertexAttribute::Size::Size_8_8: 334 case Maxwell::VertexAttribute::Size::Size_R8_G8:
335 case Maxwell::VertexAttribute::Size::Size_G8_R8:
331 return VK_FORMAT_R8G8_UNORM; 336 return VK_FORMAT_R8G8_UNORM;
332 case Maxwell::VertexAttribute::Size::Size_8_8_8: 337 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8:
333 return VK_FORMAT_R8G8B8_UNORM; 338 return VK_FORMAT_R8G8B8_UNORM;
334 case Maxwell::VertexAttribute::Size::Size_8_8_8_8: 339 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8_A8:
340 case Maxwell::VertexAttribute::Size::Size_X8_B8_G8_R8:
335 return VK_FORMAT_R8G8B8A8_UNORM; 341 return VK_FORMAT_R8G8B8A8_UNORM;
336 case Maxwell::VertexAttribute::Size::Size_16: 342 case Maxwell::VertexAttribute::Size::Size_R16:
337 return VK_FORMAT_R16_UNORM; 343 return VK_FORMAT_R16_UNORM;
338 case Maxwell::VertexAttribute::Size::Size_16_16: 344 case Maxwell::VertexAttribute::Size::Size_R16_G16:
339 return VK_FORMAT_R16G16_UNORM; 345 return VK_FORMAT_R16G16_UNORM;
340 case Maxwell::VertexAttribute::Size::Size_16_16_16: 346 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
341 return VK_FORMAT_R16G16B16_UNORM; 347 return VK_FORMAT_R16G16B16_UNORM;
342 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 348 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
343 return VK_FORMAT_R16G16B16A16_UNORM; 349 return VK_FORMAT_R16G16B16A16_UNORM;
344 case Maxwell::VertexAttribute::Size::Size_10_10_10_2: 350 case Maxwell::VertexAttribute::Size::Size_A2_B10_G10_R10:
345 return VK_FORMAT_A2B10G10R10_UNORM_PACK32; 351 return VK_FORMAT_A2B10G10R10_UNORM_PACK32;
346 default: 352 default:
347 break; 353 break;
348 } 354 }
349 break; 355 break;
350 case Maxwell::VertexAttribute::Type::SignedNorm: 356 case Maxwell::VertexAttribute::Type::SNorm:
351 switch (size) { 357 switch (size) {
352 case Maxwell::VertexAttribute::Size::Size_8: 358 case Maxwell::VertexAttribute::Size::Size_R8:
359 case Maxwell::VertexAttribute::Size::Size_A8:
353 return VK_FORMAT_R8_SNORM; 360 return VK_FORMAT_R8_SNORM;
354 case Maxwell::VertexAttribute::Size::Size_8_8: 361 case Maxwell::VertexAttribute::Size::Size_R8_G8:
362 case Maxwell::VertexAttribute::Size::Size_G8_R8:
355 return VK_FORMAT_R8G8_SNORM; 363 return VK_FORMAT_R8G8_SNORM;
356 case Maxwell::VertexAttribute::Size::Size_8_8_8: 364 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8:
357 return VK_FORMAT_R8G8B8_SNORM; 365 return VK_FORMAT_R8G8B8_SNORM;
358 case Maxwell::VertexAttribute::Size::Size_8_8_8_8: 366 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8_A8:
367 case Maxwell::VertexAttribute::Size::Size_X8_B8_G8_R8:
359 return VK_FORMAT_R8G8B8A8_SNORM; 368 return VK_FORMAT_R8G8B8A8_SNORM;
360 case Maxwell::VertexAttribute::Size::Size_16: 369 case Maxwell::VertexAttribute::Size::Size_R16:
361 return VK_FORMAT_R16_SNORM; 370 return VK_FORMAT_R16_SNORM;
362 case Maxwell::VertexAttribute::Size::Size_16_16: 371 case Maxwell::VertexAttribute::Size::Size_R16_G16:
363 return VK_FORMAT_R16G16_SNORM; 372 return VK_FORMAT_R16G16_SNORM;
364 case Maxwell::VertexAttribute::Size::Size_16_16_16: 373 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
365 return VK_FORMAT_R16G16B16_SNORM; 374 return VK_FORMAT_R16G16B16_SNORM;
366 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 375 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
367 return VK_FORMAT_R16G16B16A16_SNORM; 376 return VK_FORMAT_R16G16B16A16_SNORM;
368 case Maxwell::VertexAttribute::Size::Size_10_10_10_2: 377 case Maxwell::VertexAttribute::Size::Size_A2_B10_G10_R10:
369 return VK_FORMAT_A2B10G10R10_SNORM_PACK32; 378 return VK_FORMAT_A2B10G10R10_SNORM_PACK32;
370 default: 379 default:
371 break; 380 break;
372 } 381 }
373 break; 382 break;
374 case Maxwell::VertexAttribute::Type::UnsignedScaled: 383 case Maxwell::VertexAttribute::Type::UScaled:
375 switch (size) { 384 switch (size) {
376 case Maxwell::VertexAttribute::Size::Size_8: 385 case Maxwell::VertexAttribute::Size::Size_R8:
386 case Maxwell::VertexAttribute::Size::Size_A8:
377 return VK_FORMAT_R8_USCALED; 387 return VK_FORMAT_R8_USCALED;
378 case Maxwell::VertexAttribute::Size::Size_8_8: 388 case Maxwell::VertexAttribute::Size::Size_R8_G8:
389 case Maxwell::VertexAttribute::Size::Size_G8_R8:
379 return VK_FORMAT_R8G8_USCALED; 390 return VK_FORMAT_R8G8_USCALED;
380 case Maxwell::VertexAttribute::Size::Size_8_8_8: 391 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8:
381 return VK_FORMAT_R8G8B8_USCALED; 392 return VK_FORMAT_R8G8B8_USCALED;
382 case Maxwell::VertexAttribute::Size::Size_8_8_8_8: 393 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8_A8:
394 case Maxwell::VertexAttribute::Size::Size_X8_B8_G8_R8:
383 return VK_FORMAT_R8G8B8A8_USCALED; 395 return VK_FORMAT_R8G8B8A8_USCALED;
384 case Maxwell::VertexAttribute::Size::Size_16: 396 case Maxwell::VertexAttribute::Size::Size_R16:
385 return VK_FORMAT_R16_USCALED; 397 return VK_FORMAT_R16_USCALED;
386 case Maxwell::VertexAttribute::Size::Size_16_16: 398 case Maxwell::VertexAttribute::Size::Size_R16_G16:
387 return VK_FORMAT_R16G16_USCALED; 399 return VK_FORMAT_R16G16_USCALED;
388 case Maxwell::VertexAttribute::Size::Size_16_16_16: 400 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
389 return VK_FORMAT_R16G16B16_USCALED; 401 return VK_FORMAT_R16G16B16_USCALED;
390 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 402 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
391 return VK_FORMAT_R16G16B16A16_USCALED; 403 return VK_FORMAT_R16G16B16A16_USCALED;
392 case Maxwell::VertexAttribute::Size::Size_10_10_10_2: 404 case Maxwell::VertexAttribute::Size::Size_A2_B10_G10_R10:
393 return VK_FORMAT_A2B10G10R10_USCALED_PACK32; 405 return VK_FORMAT_A2B10G10R10_USCALED_PACK32;
394 default: 406 default:
395 break; 407 break;
396 } 408 }
397 break; 409 break;
398 case Maxwell::VertexAttribute::Type::SignedScaled: 410 case Maxwell::VertexAttribute::Type::SScaled:
399 switch (size) { 411 switch (size) {
400 case Maxwell::VertexAttribute::Size::Size_8: 412 case Maxwell::VertexAttribute::Size::Size_R8:
413 case Maxwell::VertexAttribute::Size::Size_A8:
401 return VK_FORMAT_R8_SSCALED; 414 return VK_FORMAT_R8_SSCALED;
402 case Maxwell::VertexAttribute::Size::Size_8_8: 415 case Maxwell::VertexAttribute::Size::Size_R8_G8:
416 case Maxwell::VertexAttribute::Size::Size_G8_R8:
403 return VK_FORMAT_R8G8_SSCALED; 417 return VK_FORMAT_R8G8_SSCALED;
404 case Maxwell::VertexAttribute::Size::Size_8_8_8: 418 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8:
405 return VK_FORMAT_R8G8B8_SSCALED; 419 return VK_FORMAT_R8G8B8_SSCALED;
406 case Maxwell::VertexAttribute::Size::Size_8_8_8_8: 420 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8_A8:
421 case Maxwell::VertexAttribute::Size::Size_X8_B8_G8_R8:
407 return VK_FORMAT_R8G8B8A8_SSCALED; 422 return VK_FORMAT_R8G8B8A8_SSCALED;
408 case Maxwell::VertexAttribute::Size::Size_16: 423 case Maxwell::VertexAttribute::Size::Size_R16:
409 return VK_FORMAT_R16_SSCALED; 424 return VK_FORMAT_R16_SSCALED;
410 case Maxwell::VertexAttribute::Size::Size_16_16: 425 case Maxwell::VertexAttribute::Size::Size_R16_G16:
411 return VK_FORMAT_R16G16_SSCALED; 426 return VK_FORMAT_R16G16_SSCALED;
412 case Maxwell::VertexAttribute::Size::Size_16_16_16: 427 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
413 return VK_FORMAT_R16G16B16_SSCALED; 428 return VK_FORMAT_R16G16B16_SSCALED;
414 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 429 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
415 return VK_FORMAT_R16G16B16A16_SSCALED; 430 return VK_FORMAT_R16G16B16A16_SSCALED;
416 case Maxwell::VertexAttribute::Size::Size_10_10_10_2: 431 case Maxwell::VertexAttribute::Size::Size_A2_B10_G10_R10:
417 return VK_FORMAT_A2B10G10R10_SSCALED_PACK32; 432 return VK_FORMAT_A2B10G10R10_SSCALED_PACK32;
418 default: 433 default:
419 break; 434 break;
420 } 435 }
421 break; 436 break;
422 case Maxwell::VertexAttribute::Type::UnsignedInt: 437 case Maxwell::VertexAttribute::Type::UInt:
423 switch (size) { 438 switch (size) {
424 case Maxwell::VertexAttribute::Size::Size_8: 439 case Maxwell::VertexAttribute::Size::Size_R8:
440 case Maxwell::VertexAttribute::Size::Size_A8:
425 return VK_FORMAT_R8_UINT; 441 return VK_FORMAT_R8_UINT;
426 case Maxwell::VertexAttribute::Size::Size_8_8: 442 case Maxwell::VertexAttribute::Size::Size_R8_G8:
443 case Maxwell::VertexAttribute::Size::Size_G8_R8:
427 return VK_FORMAT_R8G8_UINT; 444 return VK_FORMAT_R8G8_UINT;
428 case Maxwell::VertexAttribute::Size::Size_8_8_8: 445 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8:
429 return VK_FORMAT_R8G8B8_UINT; 446 return VK_FORMAT_R8G8B8_UINT;
430 case Maxwell::VertexAttribute::Size::Size_8_8_8_8: 447 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8_A8:
448 case Maxwell::VertexAttribute::Size::Size_X8_B8_G8_R8:
431 return VK_FORMAT_R8G8B8A8_UINT; 449 return VK_FORMAT_R8G8B8A8_UINT;
432 case Maxwell::VertexAttribute::Size::Size_16: 450 case Maxwell::VertexAttribute::Size::Size_R16:
433 return VK_FORMAT_R16_UINT; 451 return VK_FORMAT_R16_UINT;
434 case Maxwell::VertexAttribute::Size::Size_16_16: 452 case Maxwell::VertexAttribute::Size::Size_R16_G16:
435 return VK_FORMAT_R16G16_UINT; 453 return VK_FORMAT_R16G16_UINT;
436 case Maxwell::VertexAttribute::Size::Size_16_16_16: 454 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
437 return VK_FORMAT_R16G16B16_UINT; 455 return VK_FORMAT_R16G16B16_UINT;
438 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 456 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
439 return VK_FORMAT_R16G16B16A16_UINT; 457 return VK_FORMAT_R16G16B16A16_UINT;
440 case Maxwell::VertexAttribute::Size::Size_32: 458 case Maxwell::VertexAttribute::Size::Size_R32:
441 return VK_FORMAT_R32_UINT; 459 return VK_FORMAT_R32_UINT;
442 case Maxwell::VertexAttribute::Size::Size_32_32: 460 case Maxwell::VertexAttribute::Size::Size_R32_G32:
443 return VK_FORMAT_R32G32_UINT; 461 return VK_FORMAT_R32G32_UINT;
444 case Maxwell::VertexAttribute::Size::Size_32_32_32: 462 case Maxwell::VertexAttribute::Size::Size_R32_G32_B32:
445 return VK_FORMAT_R32G32B32_UINT; 463 return VK_FORMAT_R32G32B32_UINT;
446 case Maxwell::VertexAttribute::Size::Size_32_32_32_32: 464 case Maxwell::VertexAttribute::Size::Size_R32_G32_B32_A32:
447 return VK_FORMAT_R32G32B32A32_UINT; 465 return VK_FORMAT_R32G32B32A32_UINT;
448 case Maxwell::VertexAttribute::Size::Size_10_10_10_2: 466 case Maxwell::VertexAttribute::Size::Size_A2_B10_G10_R10:
449 return VK_FORMAT_A2B10G10R10_UINT_PACK32; 467 return VK_FORMAT_A2B10G10R10_UINT_PACK32;
450 default: 468 default:
451 break; 469 break;
452 } 470 }
453 break; 471 break;
454 case Maxwell::VertexAttribute::Type::SignedInt: 472 case Maxwell::VertexAttribute::Type::SInt:
455 switch (size) { 473 switch (size) {
456 case Maxwell::VertexAttribute::Size::Size_8: 474 case Maxwell::VertexAttribute::Size::Size_R8:
475 case Maxwell::VertexAttribute::Size::Size_A8:
457 return VK_FORMAT_R8_SINT; 476 return VK_FORMAT_R8_SINT;
458 case Maxwell::VertexAttribute::Size::Size_8_8: 477 case Maxwell::VertexAttribute::Size::Size_R8_G8:
478 case Maxwell::VertexAttribute::Size::Size_G8_R8:
459 return VK_FORMAT_R8G8_SINT; 479 return VK_FORMAT_R8G8_SINT;
460 case Maxwell::VertexAttribute::Size::Size_8_8_8: 480 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8:
461 return VK_FORMAT_R8G8B8_SINT; 481 return VK_FORMAT_R8G8B8_SINT;
462 case Maxwell::VertexAttribute::Size::Size_8_8_8_8: 482 case Maxwell::VertexAttribute::Size::Size_R8_G8_B8_A8:
483 case Maxwell::VertexAttribute::Size::Size_X8_B8_G8_R8:
463 return VK_FORMAT_R8G8B8A8_SINT; 484 return VK_FORMAT_R8G8B8A8_SINT;
464 case Maxwell::VertexAttribute::Size::Size_16: 485 case Maxwell::VertexAttribute::Size::Size_R16:
465 return VK_FORMAT_R16_SINT; 486 return VK_FORMAT_R16_SINT;
466 case Maxwell::VertexAttribute::Size::Size_16_16: 487 case Maxwell::VertexAttribute::Size::Size_R16_G16:
467 return VK_FORMAT_R16G16_SINT; 488 return VK_FORMAT_R16G16_SINT;
468 case Maxwell::VertexAttribute::Size::Size_16_16_16: 489 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
469 return VK_FORMAT_R16G16B16_SINT; 490 return VK_FORMAT_R16G16B16_SINT;
470 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 491 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
471 return VK_FORMAT_R16G16B16A16_SINT; 492 return VK_FORMAT_R16G16B16A16_SINT;
472 case Maxwell::VertexAttribute::Size::Size_32: 493 case Maxwell::VertexAttribute::Size::Size_R32:
473 return VK_FORMAT_R32_SINT; 494 return VK_FORMAT_R32_SINT;
474 case Maxwell::VertexAttribute::Size::Size_32_32: 495 case Maxwell::VertexAttribute::Size::Size_R32_G32:
475 return VK_FORMAT_R32G32_SINT; 496 return VK_FORMAT_R32G32_SINT;
476 case Maxwell::VertexAttribute::Size::Size_32_32_32: 497 case Maxwell::VertexAttribute::Size::Size_R32_G32_B32:
477 return VK_FORMAT_R32G32B32_SINT; 498 return VK_FORMAT_R32G32B32_SINT;
478 case Maxwell::VertexAttribute::Size::Size_32_32_32_32: 499 case Maxwell::VertexAttribute::Size::Size_R32_G32_B32_A32:
479 return VK_FORMAT_R32G32B32A32_SINT; 500 return VK_FORMAT_R32G32B32A32_SINT;
480 case Maxwell::VertexAttribute::Size::Size_10_10_10_2: 501 case Maxwell::VertexAttribute::Size::Size_A2_B10_G10_R10:
481 return VK_FORMAT_A2B10G10R10_SINT_PACK32; 502 return VK_FORMAT_A2B10G10R10_SINT_PACK32;
482 default: 503 default:
483 break; 504 break;
@@ -485,23 +506,23 @@ VkFormat VertexFormat(const Device& device, Maxwell::VertexAttribute::Type type,
485 break; 506 break;
486 case Maxwell::VertexAttribute::Type::Float: 507 case Maxwell::VertexAttribute::Type::Float:
487 switch (size) { 508 switch (size) {
488 case Maxwell::VertexAttribute::Size::Size_16: 509 case Maxwell::VertexAttribute::Size::Size_R16:
489 return VK_FORMAT_R16_SFLOAT; 510 return VK_FORMAT_R16_SFLOAT;
490 case Maxwell::VertexAttribute::Size::Size_16_16: 511 case Maxwell::VertexAttribute::Size::Size_R16_G16:
491 return VK_FORMAT_R16G16_SFLOAT; 512 return VK_FORMAT_R16G16_SFLOAT;
492 case Maxwell::VertexAttribute::Size::Size_16_16_16: 513 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16:
493 return VK_FORMAT_R16G16B16_SFLOAT; 514 return VK_FORMAT_R16G16B16_SFLOAT;
494 case Maxwell::VertexAttribute::Size::Size_16_16_16_16: 515 case Maxwell::VertexAttribute::Size::Size_R16_G16_B16_A16:
495 return VK_FORMAT_R16G16B16A16_SFLOAT; 516 return VK_FORMAT_R16G16B16A16_SFLOAT;
496 case Maxwell::VertexAttribute::Size::Size_32: 517 case Maxwell::VertexAttribute::Size::Size_R32:
497 return VK_FORMAT_R32_SFLOAT; 518 return VK_FORMAT_R32_SFLOAT;
498 case Maxwell::VertexAttribute::Size::Size_32_32: 519 case Maxwell::VertexAttribute::Size::Size_R32_G32:
499 return VK_FORMAT_R32G32_SFLOAT; 520 return VK_FORMAT_R32G32_SFLOAT;
500 case Maxwell::VertexAttribute::Size::Size_32_32_32: 521 case Maxwell::VertexAttribute::Size::Size_R32_G32_B32:
501 return VK_FORMAT_R32G32B32_SFLOAT; 522 return VK_FORMAT_R32G32B32_SFLOAT;
502 case Maxwell::VertexAttribute::Size::Size_32_32_32_32: 523 case Maxwell::VertexAttribute::Size::Size_R32_G32_B32_A32:
503 return VK_FORMAT_R32G32B32A32_SFLOAT; 524 return VK_FORMAT_R32G32B32A32_SFLOAT;
504 case Maxwell::VertexAttribute::Size::Size_11_11_10: 525 case Maxwell::VertexAttribute::Size::Size_B10_G11_R11:
505 return VK_FORMAT_B10G11R11_UFLOAT_PACK32; 526 return VK_FORMAT_B10G11R11_UFLOAT_PACK32;
506 default: 527 default:
507 break; 528 break;
@@ -521,29 +542,29 @@ VkFormat VertexFormat(const Device& device, Maxwell::VertexAttribute::Type type,
521 542
522VkCompareOp ComparisonOp(Maxwell::ComparisonOp comparison) { 543VkCompareOp ComparisonOp(Maxwell::ComparisonOp comparison) {
523 switch (comparison) { 544 switch (comparison) {
524 case Maxwell::ComparisonOp::Never: 545 case Maxwell::ComparisonOp::Never_D3D:
525 case Maxwell::ComparisonOp::NeverOld: 546 case Maxwell::ComparisonOp::Never_GL:
526 return VK_COMPARE_OP_NEVER; 547 return VK_COMPARE_OP_NEVER;
527 case Maxwell::ComparisonOp::Less: 548 case Maxwell::ComparisonOp::Less_D3D:
528 case Maxwell::ComparisonOp::LessOld: 549 case Maxwell::ComparisonOp::Less_GL:
529 return VK_COMPARE_OP_LESS; 550 return VK_COMPARE_OP_LESS;
530 case Maxwell::ComparisonOp::Equal: 551 case Maxwell::ComparisonOp::Equal_D3D:
531 case Maxwell::ComparisonOp::EqualOld: 552 case Maxwell::ComparisonOp::Equal_GL:
532 return VK_COMPARE_OP_EQUAL; 553 return VK_COMPARE_OP_EQUAL;
533 case Maxwell::ComparisonOp::LessEqual: 554 case Maxwell::ComparisonOp::LessEqual_D3D:
534 case Maxwell::ComparisonOp::LessEqualOld: 555 case Maxwell::ComparisonOp::LessEqual_GL:
535 return VK_COMPARE_OP_LESS_OR_EQUAL; 556 return VK_COMPARE_OP_LESS_OR_EQUAL;
536 case Maxwell::ComparisonOp::Greater: 557 case Maxwell::ComparisonOp::Greater_D3D:
537 case Maxwell::ComparisonOp::GreaterOld: 558 case Maxwell::ComparisonOp::Greater_GL:
538 return VK_COMPARE_OP_GREATER; 559 return VK_COMPARE_OP_GREATER;
539 case Maxwell::ComparisonOp::NotEqual: 560 case Maxwell::ComparisonOp::NotEqual_D3D:
540 case Maxwell::ComparisonOp::NotEqualOld: 561 case Maxwell::ComparisonOp::NotEqual_GL:
541 return VK_COMPARE_OP_NOT_EQUAL; 562 return VK_COMPARE_OP_NOT_EQUAL;
542 case Maxwell::ComparisonOp::GreaterEqual: 563 case Maxwell::ComparisonOp::GreaterEqual_D3D:
543 case Maxwell::ComparisonOp::GreaterEqualOld: 564 case Maxwell::ComparisonOp::GreaterEqual_GL:
544 return VK_COMPARE_OP_GREATER_OR_EQUAL; 565 return VK_COMPARE_OP_GREATER_OR_EQUAL;
545 case Maxwell::ComparisonOp::Always: 566 case Maxwell::ComparisonOp::Always_D3D:
546 case Maxwell::ComparisonOp::AlwaysOld: 567 case Maxwell::ComparisonOp::Always_GL:
547 return VK_COMPARE_OP_ALWAYS; 568 return VK_COMPARE_OP_ALWAYS;
548 } 569 }
549 UNIMPLEMENTED_MSG("Unimplemented comparison op={}", comparison); 570 UNIMPLEMENTED_MSG("Unimplemented comparison op={}", comparison);
@@ -563,31 +584,31 @@ VkIndexType IndexFormat(Maxwell::IndexFormat index_format) {
563 return {}; 584 return {};
564} 585}
565 586
566VkStencilOp StencilOp(Maxwell::StencilOp stencil_op) { 587VkStencilOp StencilOp(Maxwell::StencilOp::Op stencil_op) {
567 switch (stencil_op) { 588 switch (stencil_op) {
568 case Maxwell::StencilOp::Keep: 589 case Maxwell::StencilOp::Op::Keep_D3D:
569 case Maxwell::StencilOp::KeepOGL: 590 case Maxwell::StencilOp::Op::Keep_GL:
570 return VK_STENCIL_OP_KEEP; 591 return VK_STENCIL_OP_KEEP;
571 case Maxwell::StencilOp::Zero: 592 case Maxwell::StencilOp::Op::Zero_D3D:
572 case Maxwell::StencilOp::ZeroOGL: 593 case Maxwell::StencilOp::Op::Zero_GL:
573 return VK_STENCIL_OP_ZERO; 594 return VK_STENCIL_OP_ZERO;
574 case Maxwell::StencilOp::Replace: 595 case Maxwell::StencilOp::Op::Replace_D3D:
575 case Maxwell::StencilOp::ReplaceOGL: 596 case Maxwell::StencilOp::Op::Replace_GL:
576 return VK_STENCIL_OP_REPLACE; 597 return VK_STENCIL_OP_REPLACE;
577 case Maxwell::StencilOp::Incr: 598 case Maxwell::StencilOp::Op::IncrSaturate_D3D:
578 case Maxwell::StencilOp::IncrOGL: 599 case Maxwell::StencilOp::Op::IncrSaturate_GL:
579 return VK_STENCIL_OP_INCREMENT_AND_CLAMP; 600 return VK_STENCIL_OP_INCREMENT_AND_CLAMP;
580 case Maxwell::StencilOp::Decr: 601 case Maxwell::StencilOp::Op::DecrSaturate_D3D:
581 case Maxwell::StencilOp::DecrOGL: 602 case Maxwell::StencilOp::Op::DecrSaturate_GL:
582 return VK_STENCIL_OP_DECREMENT_AND_CLAMP; 603 return VK_STENCIL_OP_DECREMENT_AND_CLAMP;
583 case Maxwell::StencilOp::Invert: 604 case Maxwell::StencilOp::Op::Invert_D3D:
584 case Maxwell::StencilOp::InvertOGL: 605 case Maxwell::StencilOp::Op::Invert_GL:
585 return VK_STENCIL_OP_INVERT; 606 return VK_STENCIL_OP_INVERT;
586 case Maxwell::StencilOp::IncrWrap: 607 case Maxwell::StencilOp::Op::Incr_D3D:
587 case Maxwell::StencilOp::IncrWrapOGL: 608 case Maxwell::StencilOp::Op::Incr_GL:
588 return VK_STENCIL_OP_INCREMENT_AND_WRAP; 609 return VK_STENCIL_OP_INCREMENT_AND_WRAP;
589 case Maxwell::StencilOp::DecrWrap: 610 case Maxwell::StencilOp::Op::Decr_D3D:
590 case Maxwell::StencilOp::DecrWrapOGL: 611 case Maxwell::StencilOp::Op::Decr_GL:
591 return VK_STENCIL_OP_DECREMENT_AND_WRAP; 612 return VK_STENCIL_OP_DECREMENT_AND_WRAP;
592 } 613 }
593 UNIMPLEMENTED_MSG("Unimplemented stencil op={}", stencil_op); 614 UNIMPLEMENTED_MSG("Unimplemented stencil op={}", stencil_op);
@@ -596,20 +617,20 @@ VkStencilOp StencilOp(Maxwell::StencilOp stencil_op) {
596 617
597VkBlendOp BlendEquation(Maxwell::Blend::Equation equation) { 618VkBlendOp BlendEquation(Maxwell::Blend::Equation equation) {
598 switch (equation) { 619 switch (equation) {
599 case Maxwell::Blend::Equation::Add: 620 case Maxwell::Blend::Equation::Add_D3D:
600 case Maxwell::Blend::Equation::AddGL: 621 case Maxwell::Blend::Equation::Add_GL:
601 return VK_BLEND_OP_ADD; 622 return VK_BLEND_OP_ADD;
602 case Maxwell::Blend::Equation::Subtract: 623 case Maxwell::Blend::Equation::Subtract_D3D:
603 case Maxwell::Blend::Equation::SubtractGL: 624 case Maxwell::Blend::Equation::Subtract_GL:
604 return VK_BLEND_OP_SUBTRACT; 625 return VK_BLEND_OP_SUBTRACT;
605 case Maxwell::Blend::Equation::ReverseSubtract: 626 case Maxwell::Blend::Equation::ReverseSubtract_D3D:
606 case Maxwell::Blend::Equation::ReverseSubtractGL: 627 case Maxwell::Blend::Equation::ReverseSubtract_GL:
607 return VK_BLEND_OP_REVERSE_SUBTRACT; 628 return VK_BLEND_OP_REVERSE_SUBTRACT;
608 case Maxwell::Blend::Equation::Min: 629 case Maxwell::Blend::Equation::Min_D3D:
609 case Maxwell::Blend::Equation::MinGL: 630 case Maxwell::Blend::Equation::Min_GL:
610 return VK_BLEND_OP_MIN; 631 return VK_BLEND_OP_MIN;
611 case Maxwell::Blend::Equation::Max: 632 case Maxwell::Blend::Equation::Max_D3D:
612 case Maxwell::Blend::Equation::MaxGL: 633 case Maxwell::Blend::Equation::Max_GL:
613 return VK_BLEND_OP_MAX; 634 return VK_BLEND_OP_MAX;
614 } 635 }
615 UNIMPLEMENTED_MSG("Unimplemented blend equation={}", equation); 636 UNIMPLEMENTED_MSG("Unimplemented blend equation={}", equation);
@@ -618,62 +639,62 @@ VkBlendOp BlendEquation(Maxwell::Blend::Equation equation) {
618 639
619VkBlendFactor BlendFactor(Maxwell::Blend::Factor factor) { 640VkBlendFactor BlendFactor(Maxwell::Blend::Factor factor) {
620 switch (factor) { 641 switch (factor) {
621 case Maxwell::Blend::Factor::Zero: 642 case Maxwell::Blend::Factor::Zero_D3D:
622 case Maxwell::Blend::Factor::ZeroGL: 643 case Maxwell::Blend::Factor::Zero_GL:
623 return VK_BLEND_FACTOR_ZERO; 644 return VK_BLEND_FACTOR_ZERO;
624 case Maxwell::Blend::Factor::One: 645 case Maxwell::Blend::Factor::One_D3D:
625 case Maxwell::Blend::Factor::OneGL: 646 case Maxwell::Blend::Factor::One_GL:
626 return VK_BLEND_FACTOR_ONE; 647 return VK_BLEND_FACTOR_ONE;
627 case Maxwell::Blend::Factor::SourceColor: 648 case Maxwell::Blend::Factor::SourceColor_D3D:
628 case Maxwell::Blend::Factor::SourceColorGL: 649 case Maxwell::Blend::Factor::SourceColor_GL:
629 return VK_BLEND_FACTOR_SRC_COLOR; 650 return VK_BLEND_FACTOR_SRC_COLOR;
630 case Maxwell::Blend::Factor::OneMinusSourceColor: 651 case Maxwell::Blend::Factor::OneMinusSourceColor_D3D:
631 case Maxwell::Blend::Factor::OneMinusSourceColorGL: 652 case Maxwell::Blend::Factor::OneMinusSourceColor_GL:
632 return VK_BLEND_FACTOR_ONE_MINUS_SRC_COLOR; 653 return VK_BLEND_FACTOR_ONE_MINUS_SRC_COLOR;
633 case Maxwell::Blend::Factor::SourceAlpha: 654 case Maxwell::Blend::Factor::SourceAlpha_D3D:
634 case Maxwell::Blend::Factor::SourceAlphaGL: 655 case Maxwell::Blend::Factor::SourceAlpha_GL:
635 return VK_BLEND_FACTOR_SRC_ALPHA; 656 return VK_BLEND_FACTOR_SRC_ALPHA;
636 case Maxwell::Blend::Factor::OneMinusSourceAlpha: 657 case Maxwell::Blend::Factor::OneMinusSourceAlpha_D3D:
637 case Maxwell::Blend::Factor::OneMinusSourceAlphaGL: 658 case Maxwell::Blend::Factor::OneMinusSourceAlpha_GL:
638 return VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA; 659 return VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA;
639 case Maxwell::Blend::Factor::DestAlpha: 660 case Maxwell::Blend::Factor::DestAlpha_D3D:
640 case Maxwell::Blend::Factor::DestAlphaGL: 661 case Maxwell::Blend::Factor::DestAlpha_GL:
641 return VK_BLEND_FACTOR_DST_ALPHA; 662 return VK_BLEND_FACTOR_DST_ALPHA;
642 case Maxwell::Blend::Factor::OneMinusDestAlpha: 663 case Maxwell::Blend::Factor::OneMinusDestAlpha_D3D:
643 case Maxwell::Blend::Factor::OneMinusDestAlphaGL: 664 case Maxwell::Blend::Factor::OneMinusDestAlpha_GL:
644 return VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA; 665 return VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA;
645 case Maxwell::Blend::Factor::DestColor: 666 case Maxwell::Blend::Factor::DestColor_D3D:
646 case Maxwell::Blend::Factor::DestColorGL: 667 case Maxwell::Blend::Factor::DestColor_GL:
647 return VK_BLEND_FACTOR_DST_COLOR; 668 return VK_BLEND_FACTOR_DST_COLOR;
648 case Maxwell::Blend::Factor::OneMinusDestColor: 669 case Maxwell::Blend::Factor::OneMinusDestColor_D3D:
649 case Maxwell::Blend::Factor::OneMinusDestColorGL: 670 case Maxwell::Blend::Factor::OneMinusDestColor_GL:
650 return VK_BLEND_FACTOR_ONE_MINUS_DST_COLOR; 671 return VK_BLEND_FACTOR_ONE_MINUS_DST_COLOR;
651 case Maxwell::Blend::Factor::SourceAlphaSaturate: 672 case Maxwell::Blend::Factor::SourceAlphaSaturate_D3D:
652 case Maxwell::Blend::Factor::SourceAlphaSaturateGL: 673 case Maxwell::Blend::Factor::SourceAlphaSaturate_GL:
653 return VK_BLEND_FACTOR_SRC_ALPHA_SATURATE; 674 return VK_BLEND_FACTOR_SRC_ALPHA_SATURATE;
654 case Maxwell::Blend::Factor::Source1Color: 675 case Maxwell::Blend::Factor::Source1Color_D3D:
655 case Maxwell::Blend::Factor::Source1ColorGL: 676 case Maxwell::Blend::Factor::Source1Color_GL:
656 return VK_BLEND_FACTOR_SRC1_COLOR; 677 return VK_BLEND_FACTOR_SRC1_COLOR;
657 case Maxwell::Blend::Factor::OneMinusSource1Color: 678 case Maxwell::Blend::Factor::OneMinusSource1Color_D3D:
658 case Maxwell::Blend::Factor::OneMinusSource1ColorGL: 679 case Maxwell::Blend::Factor::OneMinusSource1Color_GL:
659 return VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR; 680 return VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR;
660 case Maxwell::Blend::Factor::Source1Alpha: 681 case Maxwell::Blend::Factor::Source1Alpha_D3D:
661 case Maxwell::Blend::Factor::Source1AlphaGL: 682 case Maxwell::Blend::Factor::Source1Alpha_GL:
662 return VK_BLEND_FACTOR_SRC1_ALPHA; 683 return VK_BLEND_FACTOR_SRC1_ALPHA;
663 case Maxwell::Blend::Factor::OneMinusSource1Alpha: 684 case Maxwell::Blend::Factor::OneMinusSource1Alpha_D3D:
664 case Maxwell::Blend::Factor::OneMinusSource1AlphaGL: 685 case Maxwell::Blend::Factor::OneMinusSource1Alpha_GL:
665 return VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA; 686 return VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA;
666 case Maxwell::Blend::Factor::ConstantColor: 687 case Maxwell::Blend::Factor::BlendFactor_D3D:
667 case Maxwell::Blend::Factor::ConstantColorGL: 688 case Maxwell::Blend::Factor::ConstantColor_GL:
668 return VK_BLEND_FACTOR_CONSTANT_COLOR; 689 return VK_BLEND_FACTOR_CONSTANT_COLOR;
669 case Maxwell::Blend::Factor::OneMinusConstantColor: 690 case Maxwell::Blend::Factor::OneMinusBlendFactor_D3D:
670 case Maxwell::Blend::Factor::OneMinusConstantColorGL: 691 case Maxwell::Blend::Factor::OneMinusConstantColor_GL:
671 return VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR; 692 return VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR;
672 case Maxwell::Blend::Factor::ConstantAlpha: 693 case Maxwell::Blend::Factor::BothSourceAlpha_D3D:
673 case Maxwell::Blend::Factor::ConstantAlphaGL: 694 case Maxwell::Blend::Factor::ConstantAlpha_GL:
674 return VK_BLEND_FACTOR_CONSTANT_ALPHA; 695 return VK_BLEND_FACTOR_CONSTANT_ALPHA;
675 case Maxwell::Blend::Factor::OneMinusConstantAlpha: 696 case Maxwell::Blend::Factor::OneMinusBothSourceAlpha_D3D:
676 case Maxwell::Blend::Factor::OneMinusConstantAlphaGL: 697 case Maxwell::Blend::Factor::OneMinusConstantAlpha_GL:
677 return VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA; 698 return VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA;
678 } 699 }
679 UNIMPLEMENTED_MSG("Unimplemented blend factor={}", factor); 700 UNIMPLEMENTED_MSG("Unimplemented blend factor={}", factor);
diff --git a/src/video_core/renderer_vulkan/maxwell_to_vk.h b/src/video_core/renderer_vulkan/maxwell_to_vk.h
index 356d46292..6f65502d6 100644
--- a/src/video_core/renderer_vulkan/maxwell_to_vk.h
+++ b/src/video_core/renderer_vulkan/maxwell_to_vk.h
@@ -55,7 +55,7 @@ VkCompareOp ComparisonOp(Maxwell::ComparisonOp comparison);
55 55
56VkIndexType IndexFormat(Maxwell::IndexFormat index_format); 56VkIndexType IndexFormat(Maxwell::IndexFormat index_format);
57 57
58VkStencilOp StencilOp(Maxwell::StencilOp stencil_op); 58VkStencilOp StencilOp(Maxwell::StencilOp::Op stencil_op);
59 59
60VkBlendOp BlendEquation(Maxwell::Blend::Equation equation); 60VkBlendOp BlendEquation(Maxwell::Blend::Equation equation);
61 61
diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
index f47786f48..c3f66c8a3 100644
--- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
+++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
@@ -288,7 +288,7 @@ void GraphicsPipeline::ConfigureImpl(bool is_indexed) {
288 buffer_cache.SetUniformBuffersState(enabled_uniform_buffer_masks, &uniform_buffer_sizes); 288 buffer_cache.SetUniformBuffersState(enabled_uniform_buffer_masks, &uniform_buffer_sizes);
289 289
290 const auto& regs{maxwell3d->regs}; 290 const auto& regs{maxwell3d->regs};
291 const bool via_header_index{regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex}; 291 const bool via_header_index{regs.sampler_binding == Maxwell::SamplerBinding::ViaHeaderBinding};
292 const auto config_stage{[&](size_t stage) LAMBDA_FORCEINLINE { 292 const auto config_stage{[&](size_t stage) LAMBDA_FORCEINLINE {
293 const Shader::Info& info{stage_infos[stage]}; 293 const Shader::Info& info{stage_infos[stage]};
294 buffer_cache.UnbindGraphicsStorageBuffers(stage); 294 buffer_cache.UnbindGraphicsStorageBuffers(stage);
@@ -664,15 +664,6 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
664 .lineStippleFactor = 0, 664 .lineStippleFactor = 0,
665 .lineStipplePattern = 0, 665 .lineStipplePattern = 0,
666 }; 666 };
667 VkPipelineRasterizationConservativeStateCreateInfoEXT conservative_raster{
668 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_CONSERVATIVE_STATE_CREATE_INFO_EXT,
669 .pNext = nullptr,
670 .flags = 0,
671 .conservativeRasterizationMode = key.state.conservative_raster_enable != 0
672 ? VK_CONSERVATIVE_RASTERIZATION_MODE_OVERESTIMATE_EXT
673 : VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT,
674 .extraPrimitiveOverestimationSize = 0.0f,
675 };
676 VkPipelineRasterizationProvokingVertexStateCreateInfoEXT provoking_vertex{ 667 VkPipelineRasterizationProvokingVertexStateCreateInfoEXT provoking_vertex{
677 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_PROVOKING_VERTEX_STATE_CREATE_INFO_EXT, 668 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_PROVOKING_VERTEX_STATE_CREATE_INFO_EXT,
678 .pNext = nullptr, 669 .pNext = nullptr,
@@ -683,9 +674,6 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
683 if (IsLine(input_assembly_topology) && device.IsExtLineRasterizationSupported()) { 674 if (IsLine(input_assembly_topology) && device.IsExtLineRasterizationSupported()) {
684 line_state.pNext = std::exchange(rasterization_ci.pNext, &line_state); 675 line_state.pNext = std::exchange(rasterization_ci.pNext, &line_state);
685 } 676 }
686 if (device.IsExtConservativeRasterizationSupported()) {
687 conservative_raster.pNext = std::exchange(rasterization_ci.pNext, &conservative_raster);
688 }
689 if (device.IsExtProvokingVertexSupported()) { 677 if (device.IsExtProvokingVertexSupported()) {
690 provoking_vertex.pNext = std::exchange(rasterization_ci.pNext, &provoking_vertex); 678 provoking_vertex.pNext = std::exchange(rasterization_ci.pNext, &provoking_vertex);
691 } 679 }
diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
index 732e7b6f2..20f1d6584 100644
--- a/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
+++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
@@ -62,29 +62,29 @@ auto MakeSpan(Container& container) {
62 62
63Shader::CompareFunction MaxwellToCompareFunction(Maxwell::ComparisonOp comparison) { 63Shader::CompareFunction MaxwellToCompareFunction(Maxwell::ComparisonOp comparison) {
64 switch (comparison) { 64 switch (comparison) {
65 case Maxwell::ComparisonOp::Never: 65 case Maxwell::ComparisonOp::Never_D3D:
66 case Maxwell::ComparisonOp::NeverOld: 66 case Maxwell::ComparisonOp::Never_GL:
67 return Shader::CompareFunction::Never; 67 return Shader::CompareFunction::Never;
68 case Maxwell::ComparisonOp::Less: 68 case Maxwell::ComparisonOp::Less_D3D:
69 case Maxwell::ComparisonOp::LessOld: 69 case Maxwell::ComparisonOp::Less_GL:
70 return Shader::CompareFunction::Less; 70 return Shader::CompareFunction::Less;
71 case Maxwell::ComparisonOp::Equal: 71 case Maxwell::ComparisonOp::Equal_D3D:
72 case Maxwell::ComparisonOp::EqualOld: 72 case Maxwell::ComparisonOp::Equal_GL:
73 return Shader::CompareFunction::Equal; 73 return Shader::CompareFunction::Equal;
74 case Maxwell::ComparisonOp::LessEqual: 74 case Maxwell::ComparisonOp::LessEqual_D3D:
75 case Maxwell::ComparisonOp::LessEqualOld: 75 case Maxwell::ComparisonOp::LessEqual_GL:
76 return Shader::CompareFunction::LessThanEqual; 76 return Shader::CompareFunction::LessThanEqual;
77 case Maxwell::ComparisonOp::Greater: 77 case Maxwell::ComparisonOp::Greater_D3D:
78 case Maxwell::ComparisonOp::GreaterOld: 78 case Maxwell::ComparisonOp::Greater_GL:
79 return Shader::CompareFunction::Greater; 79 return Shader::CompareFunction::Greater;
80 case Maxwell::ComparisonOp::NotEqual: 80 case Maxwell::ComparisonOp::NotEqual_D3D:
81 case Maxwell::ComparisonOp::NotEqualOld: 81 case Maxwell::ComparisonOp::NotEqual_GL:
82 return Shader::CompareFunction::NotEqual; 82 return Shader::CompareFunction::NotEqual;
83 case Maxwell::ComparisonOp::GreaterEqual: 83 case Maxwell::ComparisonOp::GreaterEqual_D3D:
84 case Maxwell::ComparisonOp::GreaterEqualOld: 84 case Maxwell::ComparisonOp::GreaterEqual_GL:
85 return Shader::CompareFunction::GreaterThanEqual; 85 return Shader::CompareFunction::GreaterThanEqual;
86 case Maxwell::ComparisonOp::Always: 86 case Maxwell::ComparisonOp::Always_D3D:
87 case Maxwell::ComparisonOp::AlwaysOld: 87 case Maxwell::ComparisonOp::Always_GL:
88 return Shader::CompareFunction::Always; 88 return Shader::CompareFunction::Always;
89 } 89 }
90 UNIMPLEMENTED_MSG("Unimplemented comparison op={}", comparison); 90 UNIMPLEMENTED_MSG("Unimplemented comparison op={}", comparison);
@@ -96,15 +96,18 @@ Shader::AttributeType CastAttributeType(const FixedPipelineState::VertexAttribut
96 return Shader::AttributeType::Disabled; 96 return Shader::AttributeType::Disabled;
97 } 97 }
98 switch (attr.Type()) { 98 switch (attr.Type()) {
99 case Maxwell::VertexAttribute::Type::SignedNorm: 99 case Maxwell::VertexAttribute::Type::UnusedEnumDoNotUseBecauseItWillGoAway:
100 case Maxwell::VertexAttribute::Type::UnsignedNorm: 100 ASSERT_MSG(false, "Invalid vertex attribute type!");
101 case Maxwell::VertexAttribute::Type::UnsignedScaled: 101 return Shader::AttributeType::Disabled;
102 case Maxwell::VertexAttribute::Type::SignedScaled: 102 case Maxwell::VertexAttribute::Type::SNorm:
103 case Maxwell::VertexAttribute::Type::UNorm:
104 case Maxwell::VertexAttribute::Type::UScaled:
105 case Maxwell::VertexAttribute::Type::SScaled:
103 case Maxwell::VertexAttribute::Type::Float: 106 case Maxwell::VertexAttribute::Type::Float:
104 return Shader::AttributeType::Float; 107 return Shader::AttributeType::Float;
105 case Maxwell::VertexAttribute::Type::SignedInt: 108 case Maxwell::VertexAttribute::Type::SInt:
106 return Shader::AttributeType::SignedInt; 109 return Shader::AttributeType::SignedInt;
107 case Maxwell::VertexAttribute::Type::UnsignedInt: 110 case Maxwell::VertexAttribute::Type::UInt:
108 return Shader::AttributeType::UnsignedInt; 111 return Shader::AttributeType::UnsignedInt;
109 } 112 }
110 return Shader::AttributeType::Float; 113 return Shader::AttributeType::Float;
@@ -162,16 +165,14 @@ Shader::RuntimeInfo MakeRuntimeInfo(std::span<const Shader::IR::Program> program
162 } 165 }
163 break; 166 break;
164 case Shader::Stage::TessellationEval: 167 case Shader::Stage::TessellationEval:
165 // We have to flip tessellation clockwise for some reason...
166 info.tess_clockwise = key.state.tessellation_clockwise == 0;
167 info.tess_primitive = [&key] { 168 info.tess_primitive = [&key] {
168 const u32 raw{key.state.tessellation_primitive.Value()}; 169 const u32 raw{key.state.tessellation_primitive.Value()};
169 switch (static_cast<Maxwell::TessellationPrimitive>(raw)) { 170 switch (static_cast<Maxwell::Tessellation::DomainType>(raw)) {
170 case Maxwell::TessellationPrimitive::Isolines: 171 case Maxwell::Tessellation::DomainType::Isolines:
171 return Shader::TessPrimitive::Isolines; 172 return Shader::TessPrimitive::Isolines;
172 case Maxwell::TessellationPrimitive::Triangles: 173 case Maxwell::Tessellation::DomainType::Triangles:
173 return Shader::TessPrimitive::Triangles; 174 return Shader::TessPrimitive::Triangles;
174 case Maxwell::TessellationPrimitive::Quads: 175 case Maxwell::Tessellation::DomainType::Quads:
175 return Shader::TessPrimitive::Quads; 176 return Shader::TessPrimitive::Quads;
176 } 177 }
177 ASSERT(false); 178 ASSERT(false);
@@ -179,12 +180,12 @@ Shader::RuntimeInfo MakeRuntimeInfo(std::span<const Shader::IR::Program> program
179 }(); 180 }();
180 info.tess_spacing = [&] { 181 info.tess_spacing = [&] {
181 const u32 raw{key.state.tessellation_spacing}; 182 const u32 raw{key.state.tessellation_spacing};
182 switch (static_cast<Maxwell::TessellationSpacing>(raw)) { 183 switch (static_cast<Maxwell::Tessellation::Spacing>(raw)) {
183 case Maxwell::TessellationSpacing::Equal: 184 case Maxwell::Tessellation::Spacing::Integer:
184 return Shader::TessSpacing::Equal; 185 return Shader::TessSpacing::Equal;
185 case Maxwell::TessellationSpacing::FractionalOdd: 186 case Maxwell::Tessellation::Spacing::FractionalOdd:
186 return Shader::TessSpacing::FractionalOdd; 187 return Shader::TessSpacing::FractionalOdd;
187 case Maxwell::TessellationSpacing::FractionalEven: 188 case Maxwell::Tessellation::Spacing::FractionalEven:
188 return Shader::TessSpacing::FractionalEven; 189 return Shader::TessSpacing::FractionalEven;
189 } 190 }
190 ASSERT(false); 191 ASSERT(false);
@@ -490,7 +491,7 @@ GraphicsPipeline* PipelineCache::BuiltPipeline(GraphicsPipeline* pipeline) const
490 // If games are using a small index count, we can assume these are full screen quads. 491 // If games are using a small index count, we can assume these are full screen quads.
491 // Usually these shaders are only used once for building textures so we can assume they 492 // Usually these shaders are only used once for building textures so we can assume they
492 // can't be built async 493 // can't be built async
493 if (maxwell3d->regs.index_array.count <= 6 || maxwell3d->regs.vertex_buffer.count <= 6) { 494 if (maxwell3d->regs.index_buffer.count <= 6 || maxwell3d->regs.vertex_buffer.count <= 6) {
494 return pipeline; 495 return pipeline;
495 } 496 }
496 return nullptr; 497 return nullptr;
diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index acfd5da7d..892cd94a3 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -70,7 +70,7 @@ VkViewport GetViewportState(const Device& device, const Maxwell& regs, size_t in
70 const float width = conv(src.scale_x * 2.0f); 70 const float width = conv(src.scale_x * 2.0f);
71 float y = conv(src.translate_y - src.scale_y); 71 float y = conv(src.translate_y - src.scale_y);
72 float height = conv(src.scale_y * 2.0f); 72 float height = conv(src.scale_y * 2.0f);
73 bool y_negate = regs.screen_y_control.y_negate; 73 bool y_negate = regs.window_origin.mode != Maxwell::WindowOrigin::Mode::UpperLeft;
74 74
75 if (!device.IsNvViewportSwizzleSupported()) { 75 if (!device.IsNvViewportSwizzleSupported()) {
76 y_negate = y_negate != (src.swizzle.y == Maxwell::ViewportSwizzle::NegativeY); 76 y_negate = y_negate != (src.swizzle.y == Maxwell::ViewportSwizzle::NegativeY);
@@ -130,11 +130,11 @@ VkRect2D GetScissorState(const Maxwell& regs, size_t index, u32 up_scale = 1, u3
130DrawParams MakeDrawParams(const Maxwell& regs, u32 num_instances, bool is_instanced, 130DrawParams MakeDrawParams(const Maxwell& regs, u32 num_instances, bool is_instanced,
131 bool is_indexed) { 131 bool is_indexed) {
132 DrawParams params{ 132 DrawParams params{
133 .base_instance = regs.vb_base_instance, 133 .base_instance = regs.global_base_instance_index,
134 .num_instances = is_instanced ? num_instances : 1, 134 .num_instances = is_instanced ? num_instances : 1,
135 .base_vertex = is_indexed ? regs.vb_element_base : regs.vertex_buffer.first, 135 .base_vertex = is_indexed ? regs.global_base_vertex_index : regs.vertex_buffer.first,
136 .num_vertices = is_indexed ? regs.index_array.count : regs.vertex_buffer.count, 136 .num_vertices = is_indexed ? regs.index_buffer.count : regs.vertex_buffer.count,
137 .first_index = is_indexed ? regs.index_array.first : 0, 137 .first_index = is_indexed ? regs.index_buffer.first : 0,
138 .is_indexed = is_indexed, 138 .is_indexed = is_indexed,
139 }; 139 };
140 if (regs.draw.topology == Maxwell::PrimitiveTopology::Quads) { 140 if (regs.draw.topology == Maxwell::PrimitiveTopology::Quads) {
@@ -225,10 +225,10 @@ void RasterizerVulkan::Clear() {
225 query_cache.UpdateCounters(); 225 query_cache.UpdateCounters();
226 226
227 auto& regs = maxwell3d->regs; 227 auto& regs = maxwell3d->regs;
228 const bool use_color = regs.clear_buffers.R || regs.clear_buffers.G || regs.clear_buffers.B || 228 const bool use_color = regs.clear_surface.R || regs.clear_surface.G || regs.clear_surface.B ||
229 regs.clear_buffers.A; 229 regs.clear_surface.A;
230 const bool use_depth = regs.clear_buffers.Z; 230 const bool use_depth = regs.clear_surface.Z;
231 const bool use_stencil = regs.clear_buffers.S; 231 const bool use_stencil = regs.clear_surface.S;
232 if (!use_color && !use_depth && !use_stencil) { 232 if (!use_color && !use_depth && !use_stencil) {
233 return; 233 return;
234 } 234 }
@@ -254,9 +254,9 @@ void RasterizerVulkan::Clear() {
254 default_scissor.extent.height = std::numeric_limits<s32>::max(); 254 default_scissor.extent.height = std::numeric_limits<s32>::max();
255 255
256 VkClearRect clear_rect{ 256 VkClearRect clear_rect{
257 .rect = regs.clear_flags.scissor ? GetScissorState(regs, 0, up_scale, down_shift) 257 .rect = regs.clear_control.use_scissor ? GetScissorState(regs, 0, up_scale, down_shift)
258 : default_scissor, 258 : default_scissor,
259 .baseArrayLayer = regs.clear_buffers.layer, 259 .baseArrayLayer = regs.clear_surface.layer,
260 .layerCount = 1, 260 .layerCount = 1,
261 }; 261 };
262 if (clear_rect.rect.extent.width == 0 || clear_rect.rect.extent.height == 0) { 262 if (clear_rect.rect.extent.width == 0 || clear_rect.rect.extent.height == 0) {
@@ -267,7 +267,7 @@ void RasterizerVulkan::Clear() {
267 .height = std::min(clear_rect.rect.extent.height, render_area.height), 267 .height = std::min(clear_rect.rect.extent.height, render_area.height),
268 }; 268 };
269 269
270 const u32 color_attachment = regs.clear_buffers.RT; 270 const u32 color_attachment = regs.clear_surface.RT;
271 if (use_color && framebuffer->HasAspectColorBit(color_attachment)) { 271 if (use_color && framebuffer->HasAspectColorBit(color_attachment)) {
272 VkClearValue clear_value; 272 VkClearValue clear_value;
273 bool is_integer = false; 273 bool is_integer = false;
@@ -289,7 +289,8 @@ void RasterizerVulkan::Clear() {
289 break; 289 break;
290 } 290 }
291 if (!is_integer) { 291 if (!is_integer) {
292 std::memcpy(clear_value.color.float32, regs.clear_color, sizeof(regs.clear_color)); 292 std::memcpy(clear_value.color.float32, regs.clear_color.data(),
293 regs.clear_color.size() * sizeof(f32));
293 } else if (!is_signed) { 294 } else if (!is_signed) {
294 for (size_t i = 0; i < 4; i++) { 295 for (size_t i = 0; i < 4; i++) {
295 clear_value.color.uint32[i] = static_cast<u32>( 296 clear_value.color.uint32[i] = static_cast<u32>(
@@ -648,23 +649,23 @@ void RasterizerVulkan::UpdateDynamicStates() {
648 649
649void RasterizerVulkan::BeginTransformFeedback() { 650void RasterizerVulkan::BeginTransformFeedback() {
650 const auto& regs = maxwell3d->regs; 651 const auto& regs = maxwell3d->regs;
651 if (regs.tfb_enabled == 0) { 652 if (regs.transform_feedback_enabled == 0) {
652 return; 653 return;
653 } 654 }
654 if (!device.IsExtTransformFeedbackSupported()) { 655 if (!device.IsExtTransformFeedbackSupported()) {
655 LOG_ERROR(Render_Vulkan, "Transform feedbacks used but not supported"); 656 LOG_ERROR(Render_Vulkan, "Transform feedbacks used but not supported");
656 return; 657 return;
657 } 658 }
658 UNIMPLEMENTED_IF(regs.IsShaderConfigEnabled(Maxwell::ShaderProgram::TesselationControl) || 659 UNIMPLEMENTED_IF(regs.IsShaderConfigEnabled(Maxwell::ShaderType::TessellationInit) ||
659 regs.IsShaderConfigEnabled(Maxwell::ShaderProgram::TesselationEval) || 660 regs.IsShaderConfigEnabled(Maxwell::ShaderType::Tessellation) ||
660 regs.IsShaderConfigEnabled(Maxwell::ShaderProgram::Geometry)); 661 regs.IsShaderConfigEnabled(Maxwell::ShaderType::Geometry));
661 scheduler.Record( 662 scheduler.Record(
662 [](vk::CommandBuffer cmdbuf) { cmdbuf.BeginTransformFeedbackEXT(0, 0, nullptr, nullptr); }); 663 [](vk::CommandBuffer cmdbuf) { cmdbuf.BeginTransformFeedbackEXT(0, 0, nullptr, nullptr); });
663} 664}
664 665
665void RasterizerVulkan::EndTransformFeedback() { 666void RasterizerVulkan::EndTransformFeedback() {
666 const auto& regs = maxwell3d->regs; 667 const auto& regs = maxwell3d->regs;
667 if (regs.tfb_enabled == 0) { 668 if (regs.transform_feedback_enabled == 0) {
668 return; 669 return;
669 } 670 }
670 if (!device.IsExtTransformFeedbackSupported()) { 671 if (!device.IsExtTransformFeedbackSupported()) {
@@ -728,11 +729,11 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
728 if (!state_tracker.TouchDepthBias()) { 729 if (!state_tracker.TouchDepthBias()) {
729 return; 730 return;
730 } 731 }
731 float units = regs.polygon_offset_units / 2.0f; 732 float units = regs.depth_bias / 2.0f;
732 const bool is_d24 = regs.zeta.format == Tegra::DepthFormat::S8_UINT_Z24_UNORM || 733 const bool is_d24 = regs.zeta.format == Tegra::DepthFormat::Z24_UNORM_S8_UINT ||
733 regs.zeta.format == Tegra::DepthFormat::D24X8_UNORM || 734 regs.zeta.format == Tegra::DepthFormat::X8Z24_UNORM ||
734 regs.zeta.format == Tegra::DepthFormat::D24S8_UNORM || 735 regs.zeta.format == Tegra::DepthFormat::S8Z24_UNORM ||
735 regs.zeta.format == Tegra::DepthFormat::D24C8_UNORM; 736 regs.zeta.format == Tegra::DepthFormat::V8Z24_UNORM;
736 if (is_d24 && !device.SupportsD24DepthBuffer()) { 737 if (is_d24 && !device.SupportsD24DepthBuffer()) {
737 // the base formulas can be obtained from here: 738 // the base formulas can be obtained from here:
738 // https://docs.microsoft.com/en-us/windows/win32/direct3d11/d3d10-graphics-programming-guide-output-merger-stage-depth-bias 739 // https://docs.microsoft.com/en-us/windows/win32/direct3d11/d3d10-graphics-programming-guide-output-merger-stage-depth-bias
@@ -740,8 +741,8 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
740 static_cast<double>(1ULL << (32 - 24)) / (static_cast<double>(0x1.ep+127)); 741 static_cast<double>(1ULL << (32 - 24)) / (static_cast<double>(0x1.ep+127));
741 units = static_cast<float>(static_cast<double>(units) * rescale_factor); 742 units = static_cast<float>(static_cast<double>(units) * rescale_factor);
742 } 743 }
743 scheduler.Record([constant = units, clamp = regs.polygon_offset_clamp, 744 scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
744 factor = regs.polygon_offset_factor](vk::CommandBuffer cmdbuf) { 745 factor = regs.slope_scale_depth_bias](vk::CommandBuffer cmdbuf) {
745 cmdbuf.SetDepthBias(constant, clamp, factor); 746 cmdbuf.SetDepthBias(constant, clamp, factor);
746 }); 747 });
747} 748}
@@ -771,10 +772,11 @@ void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs)
771 if (regs.stencil_two_side_enable) { 772 if (regs.stencil_two_side_enable) {
772 // Separate values per face 773 // Separate values per face
773 scheduler.Record( 774 scheduler.Record(
774 [front_ref = regs.stencil_front_func_ref, front_write_mask = regs.stencil_front_mask, 775 [front_ref = regs.stencil_front_func.ref,
775 front_test_mask = regs.stencil_front_func_mask, back_ref = regs.stencil_back_func_ref, 776 front_write_mask = regs.stencil_front_func.mask,
776 back_write_mask = regs.stencil_back_mask, 777 front_test_mask = regs.stencil_front_func.func_mask,
777 back_test_mask = regs.stencil_back_func_mask](vk::CommandBuffer cmdbuf) { 778 back_ref = regs.stencil_back_func.ref, back_write_mask = regs.stencil_back_func.mask,
779 back_test_mask = regs.stencil_back_func.func_mask](vk::CommandBuffer cmdbuf) {
778 // Front face 780 // Front face
779 cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_BIT, front_ref); 781 cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_BIT, front_ref);
780 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_BIT, front_write_mask); 782 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_BIT, front_write_mask);
@@ -787,8 +789,9 @@ void RasterizerVulkan::UpdateStencilFaces(Tegra::Engines::Maxwell3D::Regs& regs)
787 }); 789 });
788 } else { 790 } else {
789 // Front face defines both faces 791 // Front face defines both faces
790 scheduler.Record([ref = regs.stencil_front_func_ref, write_mask = regs.stencil_front_mask, 792 scheduler.Record([ref = regs.stencil_front_func.ref,
791 test_mask = regs.stencil_front_func_mask](vk::CommandBuffer cmdbuf) { 793 write_mask = regs.stencil_front_func.mask,
794 test_mask = regs.stencil_front_func.func_mask](vk::CommandBuffer cmdbuf) {
792 cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_AND_BACK, ref); 795 cmdbuf.SetStencilReference(VK_STENCIL_FACE_FRONT_AND_BACK, ref);
793 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_AND_BACK, write_mask); 796 cmdbuf.SetStencilWriteMask(VK_STENCIL_FACE_FRONT_AND_BACK, write_mask);
794 cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_FRONT_AND_BACK, test_mask); 797 cmdbuf.SetStencilCompareMask(VK_STENCIL_FACE_FRONT_AND_BACK, test_mask);
@@ -800,7 +803,8 @@ void RasterizerVulkan::UpdateLineWidth(Tegra::Engines::Maxwell3D::Regs& regs) {
800 if (!state_tracker.TouchLineWidth()) { 803 if (!state_tracker.TouchLineWidth()) {
801 return; 804 return;
802 } 805 }
803 const float width = regs.line_smooth_enable ? regs.line_width_smooth : regs.line_width_aliased; 806 const float width =
807 regs.line_anti_alias_enable ? regs.line_width_smooth : regs.line_width_aliased;
804 scheduler.Record([width](vk::CommandBuffer cmdbuf) { cmdbuf.SetLineWidth(width); }); 808 scheduler.Record([width](vk::CommandBuffer cmdbuf) { cmdbuf.SetLineWidth(width); });
805} 809}
806 810
@@ -808,10 +812,10 @@ void RasterizerVulkan::UpdateCullMode(Tegra::Engines::Maxwell3D::Regs& regs) {
808 if (!state_tracker.TouchCullMode()) { 812 if (!state_tracker.TouchCullMode()) {
809 return; 813 return;
810 } 814 }
811 scheduler.Record( 815 scheduler.Record([enabled = regs.gl_cull_test_enabled,
812 [enabled = regs.cull_test_enabled, cull_face = regs.cull_face](vk::CommandBuffer cmdbuf) { 816 cull_face = regs.gl_cull_face](vk::CommandBuffer cmdbuf) {
813 cmdbuf.SetCullModeEXT(enabled ? MaxwellToVK::CullFace(cull_face) : VK_CULL_MODE_NONE); 817 cmdbuf.SetCullModeEXT(enabled ? MaxwellToVK::CullFace(cull_face) : VK_CULL_MODE_NONE);
814 }); 818 });
815} 819}
816 820
817void RasterizerVulkan::UpdateDepthBoundsTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) { 821void RasterizerVulkan::UpdateDepthBoundsTestEnable(Tegra::Engines::Maxwell3D::Regs& regs) {
@@ -860,8 +864,8 @@ void RasterizerVulkan::UpdateFrontFace(Tegra::Engines::Maxwell3D::Regs& regs) {
860 return; 864 return;
861 } 865 }
862 866
863 VkFrontFace front_face = MaxwellToVK::FrontFace(regs.front_face); 867 VkFrontFace front_face = MaxwellToVK::FrontFace(regs.gl_front_face);
864 if (regs.screen_y_control.triangle_rast_flip != 0) { 868 if (regs.window_origin.flip_y != 0) {
865 front_face = front_face == VK_FRONT_FACE_CLOCKWISE ? VK_FRONT_FACE_COUNTER_CLOCKWISE 869 front_face = front_face == VK_FRONT_FACE_CLOCKWISE ? VK_FRONT_FACE_COUNTER_CLOCKWISE
866 : VK_FRONT_FACE_CLOCKWISE; 870 : VK_FRONT_FACE_CLOCKWISE;
867 } 871 }
@@ -873,16 +877,16 @@ void RasterizerVulkan::UpdateStencilOp(Tegra::Engines::Maxwell3D::Regs& regs) {
873 if (!state_tracker.TouchStencilOp()) { 877 if (!state_tracker.TouchStencilOp()) {
874 return; 878 return;
875 } 879 }
876 const Maxwell::StencilOp fail = regs.stencil_front_op_fail; 880 const Maxwell::StencilOp::Op fail = regs.stencil_front_op.fail;
877 const Maxwell::StencilOp zfail = regs.stencil_front_op_zfail; 881 const Maxwell::StencilOp::Op zfail = regs.stencil_front_op.zfail;
878 const Maxwell::StencilOp zpass = regs.stencil_front_op_zpass; 882 const Maxwell::StencilOp::Op zpass = regs.stencil_front_op.zpass;
879 const Maxwell::ComparisonOp compare = regs.stencil_front_func_func; 883 const Maxwell::ComparisonOp compare = regs.stencil_front_op.func;
880 if (regs.stencil_two_side_enable) { 884 if (regs.stencil_two_side_enable) {
881 // Separate stencil op per face 885 // Separate stencil op per face
882 const Maxwell::StencilOp back_fail = regs.stencil_back_op_fail; 886 const Maxwell::StencilOp::Op back_fail = regs.stencil_back_op.fail;
883 const Maxwell::StencilOp back_zfail = regs.stencil_back_op_zfail; 887 const Maxwell::StencilOp::Op back_zfail = regs.stencil_back_op.zfail;
884 const Maxwell::StencilOp back_zpass = regs.stencil_back_op_zpass; 888 const Maxwell::StencilOp::Op back_zpass = regs.stencil_back_op.zpass;
885 const Maxwell::ComparisonOp back_compare = regs.stencil_back_func_func; 889 const Maxwell::ComparisonOp back_compare = regs.stencil_back_op.func;
886 scheduler.Record([fail, zfail, zpass, compare, back_fail, back_zfail, back_zpass, 890 scheduler.Record([fail, zfail, zpass, compare, back_fail, back_zfail, back_zpass,
887 back_compare](vk::CommandBuffer cmdbuf) { 891 back_compare](vk::CommandBuffer cmdbuf) {
888 cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_BIT, MaxwellToVK::StencilOp(fail), 892 cmdbuf.SetStencilOpEXT(VK_STENCIL_FACE_FRONT_BIT, MaxwellToVK::StencilOp(fail),
@@ -954,15 +958,15 @@ void RasterizerVulkan::UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs)
954 dirty[Dirty::VertexBinding0 + index] = false; 958 dirty[Dirty::VertexBinding0 + index] = false;
955 959
956 const u32 binding{static_cast<u32>(index)}; 960 const u32 binding{static_cast<u32>(index)};
957 const auto& input_binding{regs.vertex_array[binding]}; 961 const auto& input_binding{regs.vertex_streams[binding]};
958 const bool is_instanced{regs.instanced_arrays.IsInstancingEnabled(binding)}; 962 const bool is_instanced{regs.vertex_stream_instances.IsInstancingEnabled(binding)};
959 bindings.push_back({ 963 bindings.push_back({
960 .sType = VK_STRUCTURE_TYPE_VERTEX_INPUT_BINDING_DESCRIPTION_2_EXT, 964 .sType = VK_STRUCTURE_TYPE_VERTEX_INPUT_BINDING_DESCRIPTION_2_EXT,
961 .pNext = nullptr, 965 .pNext = nullptr,
962 .binding = binding, 966 .binding = binding,
963 .stride = input_binding.stride, 967 .stride = input_binding.stride,
964 .inputRate = is_instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX, 968 .inputRate = is_instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX,
965 .divisor = is_instanced ? input_binding.divisor : 1, 969 .divisor = is_instanced ? input_binding.frequency : 1,
966 }); 970 });
967 } 971 }
968 scheduler.Record([bindings, attributes](vk::CommandBuffer cmdbuf) { 972 scheduler.Record([bindings, attributes](vk::CommandBuffer cmdbuf) {
diff --git a/src/video_core/renderer_vulkan/vk_state_tracker.cpp b/src/video_core/renderer_vulkan/vk_state_tracker.cpp
index f234e1a31..ed98c8370 100644
--- a/src/video_core/renderer_vulkan/vk_state_tracker.cpp
+++ b/src/video_core/renderer_vulkan/vk_state_tracker.cpp
@@ -51,8 +51,8 @@ Flags MakeInvalidationFlags() {
51void SetupDirtyViewports(Tables& tables) { 51void SetupDirtyViewports(Tables& tables) {
52 FillBlock(tables[0], OFF(viewport_transform), NUM(viewport_transform), Viewports); 52 FillBlock(tables[0], OFF(viewport_transform), NUM(viewport_transform), Viewports);
53 FillBlock(tables[0], OFF(viewports), NUM(viewports), Viewports); 53 FillBlock(tables[0], OFF(viewports), NUM(viewports), Viewports);
54 tables[0][OFF(viewport_transform_enabled)] = Viewports; 54 tables[0][OFF(viewport_scale_offset_enbled)] = Viewports;
55 tables[1][OFF(screen_y_control)] = Viewports; 55 tables[1][OFF(window_origin)] = Viewports;
56} 56}
57 57
58void SetupDirtyScissors(Tables& tables) { 58void SetupDirtyScissors(Tables& tables) {
@@ -61,9 +61,9 @@ void SetupDirtyScissors(Tables& tables) {
61 61
62void SetupDirtyDepthBias(Tables& tables) { 62void SetupDirtyDepthBias(Tables& tables) {
63 auto& table = tables[0]; 63 auto& table = tables[0];
64 table[OFF(polygon_offset_units)] = DepthBias; 64 table[OFF(depth_bias)] = DepthBias;
65 table[OFF(polygon_offset_clamp)] = DepthBias; 65 table[OFF(depth_bias_clamp)] = DepthBias;
66 table[OFF(polygon_offset_factor)] = DepthBias; 66 table[OFF(slope_scale_depth_bias)] = DepthBias;
67} 67}
68 68
69void SetupDirtyBlendConstants(Tables& tables) { 69void SetupDirtyBlendConstants(Tables& tables) {
@@ -77,12 +77,12 @@ void SetupDirtyDepthBounds(Tables& tables) {
77void SetupDirtyStencilProperties(Tables& tables) { 77void SetupDirtyStencilProperties(Tables& tables) {
78 auto& table = tables[0]; 78 auto& table = tables[0];
79 table[OFF(stencil_two_side_enable)] = StencilProperties; 79 table[OFF(stencil_two_side_enable)] = StencilProperties;
80 table[OFF(stencil_front_func_ref)] = StencilProperties; 80 table[OFF(stencil_front_func.ref)] = StencilProperties;
81 table[OFF(stencil_front_mask)] = StencilProperties; 81 table[OFF(stencil_front_func.mask)] = StencilProperties;
82 table[OFF(stencil_front_func_mask)] = StencilProperties; 82 table[OFF(stencil_front_func.func_mask)] = StencilProperties;
83 table[OFF(stencil_back_func_ref)] = StencilProperties; 83 table[OFF(stencil_back_func.ref)] = StencilProperties;
84 table[OFF(stencil_back_mask)] = StencilProperties; 84 table[OFF(stencil_back_func.mask)] = StencilProperties;
85 table[OFF(stencil_back_func_mask)] = StencilProperties; 85 table[OFF(stencil_back_func.func_mask)] = StencilProperties;
86} 86}
87 87
88void SetupDirtyLineWidth(Tables& tables) { 88void SetupDirtyLineWidth(Tables& tables) {
@@ -92,8 +92,8 @@ void SetupDirtyLineWidth(Tables& tables) {
92 92
93void SetupDirtyCullMode(Tables& tables) { 93void SetupDirtyCullMode(Tables& tables) {
94 auto& table = tables[0]; 94 auto& table = tables[0];
95 table[OFF(cull_face)] = CullMode; 95 table[OFF(gl_cull_face)] = CullMode;
96 table[OFF(cull_test_enabled)] = CullMode; 96 table[OFF(gl_cull_test_enabled)] = CullMode;
97} 97}
98 98
99void SetupDirtyDepthBoundsEnable(Tables& tables) { 99void SetupDirtyDepthBoundsEnable(Tables& tables) {
@@ -114,20 +114,20 @@ void SetupDirtyDepthCompareOp(Tables& tables) {
114 114
115void SetupDirtyFrontFace(Tables& tables) { 115void SetupDirtyFrontFace(Tables& tables) {
116 auto& table = tables[0]; 116 auto& table = tables[0];
117 table[OFF(front_face)] = FrontFace; 117 table[OFF(gl_front_face)] = FrontFace;
118 table[OFF(screen_y_control)] = FrontFace; 118 table[OFF(window_origin)] = FrontFace;
119} 119}
120 120
121void SetupDirtyStencilOp(Tables& tables) { 121void SetupDirtyStencilOp(Tables& tables) {
122 auto& table = tables[0]; 122 auto& table = tables[0];
123 table[OFF(stencil_front_op_fail)] = StencilOp; 123 table[OFF(stencil_front_op.fail)] = StencilOp;
124 table[OFF(stencil_front_op_zfail)] = StencilOp; 124 table[OFF(stencil_front_op.zfail)] = StencilOp;
125 table[OFF(stencil_front_op_zpass)] = StencilOp; 125 table[OFF(stencil_front_op.zpass)] = StencilOp;
126 table[OFF(stencil_front_func_func)] = StencilOp; 126 table[OFF(stencil_front_op.func)] = StencilOp;
127 table[OFF(stencil_back_op_fail)] = StencilOp; 127 table[OFF(stencil_back_op.fail)] = StencilOp;
128 table[OFF(stencil_back_op_zfail)] = StencilOp; 128 table[OFF(stencil_back_op.zfail)] = StencilOp;
129 table[OFF(stencil_back_op_zpass)] = StencilOp; 129 table[OFF(stencil_back_op.zpass)] = StencilOp;
130 table[OFF(stencil_back_func_func)] = StencilOp; 130 table[OFF(stencil_back_op.func)] = StencilOp;
131 131
132 // Table 0 is used by StencilProperties 132 // Table 0 is used by StencilProperties
133 tables[1][OFF(stencil_two_side_enable)] = StencilOp; 133 tables[1][OFF(stencil_two_side_enable)] = StencilOp;
@@ -139,10 +139,10 @@ void SetupDirtyStencilTestEnable(Tables& tables) {
139 139
140void SetupDirtyBlending(Tables& tables) { 140void SetupDirtyBlending(Tables& tables) {
141 tables[0][OFF(color_mask_common)] = Blending; 141 tables[0][OFF(color_mask_common)] = Blending;
142 tables[0][OFF(independent_blend_enable)] = Blending; 142 tables[0][OFF(blend_per_target_enabled)] = Blending;
143 FillBlock(tables[0], OFF(color_mask), NUM(color_mask), Blending); 143 FillBlock(tables[0], OFF(color_mask), NUM(color_mask), Blending);
144 FillBlock(tables[0], OFF(blend), NUM(blend), Blending); 144 FillBlock(tables[0], OFF(blend), NUM(blend), Blending);
145 FillBlock(tables[0], OFF(independent_blend), NUM(independent_blend), Blending); 145 FillBlock(tables[0], OFF(blend_per_target), NUM(blend_per_target), Blending);
146} 146}
147 147
148void SetupDirtyViewportSwizzles(Tables& tables) { 148void SetupDirtyViewportSwizzles(Tables& tables) {
@@ -166,10 +166,10 @@ void SetupDirtyVertexBindings(Tables& tables) {
166 static constexpr size_t divisor_offset = 3; 166 static constexpr size_t divisor_offset = 3;
167 for (size_t i = 0; i < Regs::NumVertexArrays; ++i) { 167 for (size_t i = 0; i < Regs::NumVertexArrays; ++i) {
168 const u8 flag = static_cast<u8>(VertexBinding0 + i); 168 const u8 flag = static_cast<u8>(VertexBinding0 + i);
169 tables[0][OFF(instanced_arrays) + i] = VertexInput; 169 tables[0][OFF(vertex_stream_instances) + i] = VertexInput;
170 tables[1][OFF(instanced_arrays) + i] = flag; 170 tables[1][OFF(vertex_stream_instances) + i] = flag;
171 tables[0][OFF(vertex_array) + i * NUM(vertex_array[0]) + divisor_offset] = VertexInput; 171 tables[0][OFF(vertex_streams) + i * NUM(vertex_streams[0]) + divisor_offset] = VertexInput;
172 tables[1][OFF(vertex_array) + i * NUM(vertex_array[0]) + divisor_offset] = flag; 172 tables[1][OFF(vertex_streams) + i * NUM(vertex_streams[0]) + divisor_offset] = flag;
173 } 173 }
174} 174}
175} // Anonymous namespace 175} // Anonymous namespace
HIC SVNT DRACONES