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| author | 2018-01-11 20:07:44 -0700 | |
|---|---|---|
| committer | 2018-01-12 19:11:03 -0700 | |
| commit | 1d28b2e142f845773e2b90e267d9632e196a99b9 (patch) | |
| tree | 027a3586a0fc927731afb3711c328c6dafc8551f /src/video_core/regs_texturing.h | |
| parent | Massive removal of unused modules (diff) | |
| download | yuzu-1d28b2e142f845773e2b90e267d9632e196a99b9.tar.gz yuzu-1d28b2e142f845773e2b90e267d9632e196a99b9.tar.xz yuzu-1d28b2e142f845773e2b90e267d9632e196a99b9.zip | |
Remove references to PICA and rasterizers in video_core
Diffstat (limited to 'src/video_core/regs_texturing.h')
| -rw-r--r-- | src/video_core/regs_texturing.h | 452 |
1 files changed, 0 insertions, 452 deletions
diff --git a/src/video_core/regs_texturing.h b/src/video_core/regs_texturing.h deleted file mode 100644 index 0b09f2299..000000000 --- a/src/video_core/regs_texturing.h +++ /dev/null | |||
| @@ -1,452 +0,0 @@ | |||
| 1 | // Copyright 2017 Citra Emulator Project | ||
| 2 | // Licensed under GPLv2 or any later version | ||
| 3 | // Refer to the license.txt file included. | ||
| 4 | |||
| 5 | #pragma once | ||
| 6 | |||
| 7 | #include <array> | ||
| 8 | |||
| 9 | #include "common/assert.h" | ||
| 10 | #include "common/bit_field.h" | ||
| 11 | #include "common/common_funcs.h" | ||
| 12 | #include "common/common_types.h" | ||
| 13 | |||
| 14 | namespace Pica { | ||
| 15 | |||
| 16 | struct TexturingRegs { | ||
| 17 | struct TextureConfig { | ||
| 18 | enum TextureType : u32 { | ||
| 19 | Texture2D = 0, | ||
| 20 | TextureCube = 1, | ||
| 21 | Shadow2D = 2, | ||
| 22 | Projection2D = 3, | ||
| 23 | ShadowCube = 4, | ||
| 24 | Disabled = 5, | ||
| 25 | }; | ||
| 26 | |||
| 27 | enum WrapMode : u32 { | ||
| 28 | ClampToEdge = 0, | ||
| 29 | ClampToBorder = 1, | ||
| 30 | Repeat = 2, | ||
| 31 | MirroredRepeat = 3, | ||
| 32 | // Mode 4-7 produces some weird result and may be just invalid: | ||
| 33 | ClampToEdge2 = 4, // Positive coord: clamp to edge; negative coord: repeat | ||
| 34 | ClampToBorder2 = 5, // Positive coord: clamp to border; negative coord: repeat | ||
| 35 | Repeat2 = 6, // Same as Repeat | ||
| 36 | Repeat3 = 7, // Same as Repeat | ||
| 37 | }; | ||
| 38 | |||
| 39 | enum TextureFilter : u32 { | ||
| 40 | Nearest = 0, | ||
| 41 | Linear = 1, | ||
| 42 | }; | ||
| 43 | |||
| 44 | union { | ||
| 45 | u32 raw; | ||
| 46 | BitField<0, 8, u32> r; | ||
| 47 | BitField<8, 8, u32> g; | ||
| 48 | BitField<16, 8, u32> b; | ||
| 49 | BitField<24, 8, u32> a; | ||
| 50 | } border_color; | ||
| 51 | |||
| 52 | union { | ||
| 53 | BitField<0, 11, u32> height; | ||
| 54 | BitField<16, 11, u32> width; | ||
| 55 | }; | ||
| 56 | |||
| 57 | union { | ||
| 58 | BitField<1, 1, TextureFilter> mag_filter; | ||
| 59 | BitField<2, 1, TextureFilter> min_filter; | ||
| 60 | BitField<8, 3, WrapMode> wrap_t; | ||
| 61 | BitField<12, 3, WrapMode> wrap_s; | ||
| 62 | /// @note Only valid for texture 0 according to 3DBrew. | ||
| 63 | BitField<28, 3, TextureType> type; | ||
| 64 | }; | ||
| 65 | |||
| 66 | INSERT_PADDING_WORDS(0x1); | ||
| 67 | |||
| 68 | BitField<0, 28, u32> address; | ||
| 69 | |||
| 70 | PAddr GetPhysicalAddress() const { | ||
| 71 | return address * 8; | ||
| 72 | } | ||
| 73 | |||
| 74 | // texture1 and texture2 store the texture format directly after the address | ||
| 75 | // whereas texture0 inserts some additional flags inbetween. | ||
| 76 | // Hence, we store the format separately so that all other parameters can be described | ||
| 77 | // in a single structure. | ||
| 78 | }; | ||
| 79 | |||
| 80 | enum class TextureFormat : u32 { | ||
| 81 | RGBA8 = 0, | ||
| 82 | RGB8 = 1, | ||
| 83 | RGB5A1 = 2, | ||
| 84 | RGB565 = 3, | ||
| 85 | RGBA4 = 4, | ||
| 86 | IA8 = 5, | ||
| 87 | RG8 = 6, ///< @note Also called HILO8 in 3DBrew. | ||
| 88 | I8 = 7, | ||
| 89 | A8 = 8, | ||
| 90 | IA4 = 9, | ||
| 91 | I4 = 10, | ||
| 92 | A4 = 11, | ||
| 93 | ETC1 = 12, // compressed | ||
| 94 | ETC1A4 = 13, // compressed | ||
| 95 | }; | ||
| 96 | |||
| 97 | static unsigned NibblesPerPixel(TextureFormat format) { | ||
| 98 | switch (format) { | ||
| 99 | case TextureFormat::RGBA8: | ||
| 100 | return 8; | ||
| 101 | |||
| 102 | case TextureFormat::RGB8: | ||
| 103 | return 6; | ||
| 104 | |||
| 105 | case TextureFormat::RGB5A1: | ||
| 106 | case TextureFormat::RGB565: | ||
| 107 | case TextureFormat::RGBA4: | ||
| 108 | case TextureFormat::IA8: | ||
| 109 | case TextureFormat::RG8: | ||
| 110 | return 4; | ||
| 111 | |||
| 112 | case TextureFormat::I4: | ||
| 113 | case TextureFormat::A4: | ||
| 114 | return 1; | ||
| 115 | |||
| 116 | case TextureFormat::I8: | ||
| 117 | case TextureFormat::A8: | ||
| 118 | case TextureFormat::IA4: | ||
| 119 | |||
| 120 | default: // placeholder for yet unknown formats | ||
| 121 | UNIMPLEMENTED(); | ||
| 122 | return 0; | ||
| 123 | } | ||
| 124 | } | ||
| 125 | |||
| 126 | union { | ||
| 127 | BitField<0, 1, u32> texture0_enable; | ||
| 128 | BitField<1, 1, u32> texture1_enable; | ||
| 129 | BitField<2, 1, u32> texture2_enable; | ||
| 130 | BitField<8, 2, u32> texture3_coordinates; | ||
| 131 | BitField<10, 1, u32> texture3_enable; | ||
| 132 | BitField<13, 1, u32> texture2_use_coord1; | ||
| 133 | BitField<16, 1, u32> clear_texture_cache; // TODO: unimplemented | ||
| 134 | } main_config; | ||
| 135 | TextureConfig texture0; | ||
| 136 | |||
| 137 | enum class CubeFace { | ||
| 138 | PositiveX = 0, | ||
| 139 | NegativeX = 1, | ||
| 140 | PositiveY = 2, | ||
| 141 | NegativeY = 3, | ||
| 142 | PositiveZ = 4, | ||
| 143 | NegativeZ = 5, | ||
| 144 | }; | ||
| 145 | |||
| 146 | BitField<0, 22, u32> cube_address[5]; | ||
| 147 | |||
| 148 | PAddr GetCubePhysicalAddress(CubeFace face) const { | ||
| 149 | PAddr address = texture0.address; | ||
| 150 | if (face != CubeFace::PositiveX) { | ||
| 151 | // Bits [22:27] from the main texture address is shared with all cubemap additional | ||
| 152 | // addresses. | ||
| 153 | auto& face_addr = cube_address[static_cast<size_t>(face) - 1]; | ||
| 154 | address &= ~face_addr.mask; | ||
| 155 | address |= face_addr; | ||
| 156 | } | ||
| 157 | // A multiplier of 8 is also needed in the same way as the main address. | ||
| 158 | return address * 8; | ||
| 159 | } | ||
| 160 | |||
| 161 | INSERT_PADDING_WORDS(0x3); | ||
| 162 | BitField<0, 4, TextureFormat> texture0_format; | ||
| 163 | BitField<0, 1, u32> fragment_lighting_enable; | ||
| 164 | INSERT_PADDING_WORDS(0x1); | ||
| 165 | TextureConfig texture1; | ||
| 166 | BitField<0, 4, TextureFormat> texture1_format; | ||
| 167 | INSERT_PADDING_WORDS(0x2); | ||
| 168 | TextureConfig texture2; | ||
| 169 | BitField<0, 4, TextureFormat> texture2_format; | ||
| 170 | INSERT_PADDING_WORDS(0x9); | ||
| 171 | |||
| 172 | struct FullTextureConfig { | ||
| 173 | const bool enabled; | ||
| 174 | const TextureConfig config; | ||
| 175 | const TextureFormat format; | ||
| 176 | }; | ||
| 177 | const std::array<FullTextureConfig, 3> GetTextures() const { | ||
| 178 | return {{ | ||
| 179 | {main_config.texture0_enable.ToBool(), texture0, texture0_format}, | ||
| 180 | {main_config.texture1_enable.ToBool(), texture1, texture1_format}, | ||
| 181 | {main_config.texture2_enable.ToBool(), texture2, texture2_format}, | ||
| 182 | }}; | ||
| 183 | } | ||
| 184 | |||
| 185 | // 0xa8-0xad: ProcTex Config | ||
| 186 | enum class ProcTexClamp : u32 { | ||
| 187 | ToZero = 0, | ||
| 188 | ToEdge = 1, | ||
| 189 | SymmetricalRepeat = 2, | ||
| 190 | MirroredRepeat = 3, | ||
| 191 | Pulse = 4, | ||
| 192 | }; | ||
| 193 | |||
| 194 | enum class ProcTexCombiner : u32 { | ||
| 195 | U = 0, // u | ||
| 196 | U2 = 1, // u * u | ||
| 197 | V = 2, // v | ||
| 198 | V2 = 3, // v * v | ||
| 199 | Add = 4, // (u + v) / 2 | ||
| 200 | Add2 = 5, // (u * u + v * v) / 2 | ||
| 201 | SqrtAdd2 = 6, // sqrt(u * u + v * v) | ||
| 202 | Min = 7, // min(u, v) | ||
| 203 | Max = 8, // max(u, v) | ||
| 204 | RMax = 9, // Average of Max and SqrtAdd2 | ||
| 205 | }; | ||
| 206 | |||
| 207 | enum class ProcTexShift : u32 { | ||
| 208 | None = 0, | ||
| 209 | Odd = 1, | ||
| 210 | Even = 2, | ||
| 211 | }; | ||
| 212 | |||
| 213 | union { | ||
| 214 | BitField<0, 3, ProcTexClamp> u_clamp; | ||
| 215 | BitField<3, 3, ProcTexClamp> v_clamp; | ||
| 216 | BitField<6, 4, ProcTexCombiner> color_combiner; | ||
| 217 | BitField<10, 4, ProcTexCombiner> alpha_combiner; | ||
| 218 | BitField<14, 1, u32> separate_alpha; | ||
| 219 | BitField<15, 1, u32> noise_enable; | ||
| 220 | BitField<16, 2, ProcTexShift> u_shift; | ||
| 221 | BitField<18, 2, ProcTexShift> v_shift; | ||
| 222 | BitField<20, 8, u32> bias_low; // float16 TODO: unimplemented | ||
| 223 | } proctex; | ||
| 224 | |||
| 225 | union ProcTexNoiseConfig { | ||
| 226 | BitField<0, 16, s32> amplitude; // fixed1.3.12 | ||
| 227 | BitField<16, 16, u32> phase; // float16 | ||
| 228 | }; | ||
| 229 | |||
| 230 | ProcTexNoiseConfig proctex_noise_u; | ||
| 231 | ProcTexNoiseConfig proctex_noise_v; | ||
| 232 | |||
| 233 | union { | ||
| 234 | BitField<0, 16, u32> u; // float16 | ||
| 235 | BitField<16, 16, u32> v; // float16 | ||
| 236 | } proctex_noise_frequency; | ||
| 237 | |||
| 238 | enum class ProcTexFilter : u32 { | ||
| 239 | Nearest = 0, | ||
| 240 | Linear = 1, | ||
| 241 | NearestMipmapNearest = 2, | ||
| 242 | LinearMipmapNearest = 3, | ||
| 243 | NearestMipmapLinear = 4, | ||
| 244 | LinearMipmapLinear = 5, | ||
| 245 | }; | ||
| 246 | |||
| 247 | union { | ||
| 248 | BitField<0, 3, ProcTexFilter> filter; | ||
| 249 | BitField<11, 8, u32> width; | ||
| 250 | BitField<19, 8, u32> bias_high; // TODO: unimplemented | ||
| 251 | } proctex_lut; | ||
| 252 | |||
| 253 | BitField<0, 8, u32> proctex_lut_offset; | ||
| 254 | |||
| 255 | INSERT_PADDING_WORDS(0x1); | ||
| 256 | |||
| 257 | // 0xaf-0xb7: ProcTex LUT | ||
| 258 | enum class ProcTexLutTable : u32 { | ||
| 259 | Noise = 0, | ||
| 260 | ColorMap = 2, | ||
| 261 | AlphaMap = 3, | ||
| 262 | Color = 4, | ||
| 263 | ColorDiff = 5, | ||
| 264 | }; | ||
| 265 | |||
| 266 | union { | ||
| 267 | BitField<0, 8, u32> index; | ||
| 268 | BitField<8, 4, ProcTexLutTable> ref_table; | ||
| 269 | } proctex_lut_config; | ||
| 270 | |||
| 271 | u32 proctex_lut_data[8]; | ||
| 272 | |||
| 273 | INSERT_PADDING_WORDS(0x8); | ||
| 274 | |||
| 275 | // 0xc0-0xff: Texture Combiner (akin to glTexEnv) | ||
| 276 | struct TevStageConfig { | ||
| 277 | enum class Source : u32 { | ||
| 278 | PrimaryColor = 0x0, | ||
| 279 | PrimaryFragmentColor = 0x1, | ||
| 280 | SecondaryFragmentColor = 0x2, | ||
| 281 | |||
| 282 | Texture0 = 0x3, | ||
| 283 | Texture1 = 0x4, | ||
| 284 | Texture2 = 0x5, | ||
| 285 | Texture3 = 0x6, | ||
| 286 | |||
| 287 | PreviousBuffer = 0xd, | ||
| 288 | Constant = 0xe, | ||
| 289 | Previous = 0xf, | ||
| 290 | }; | ||
| 291 | |||
| 292 | enum class ColorModifier : u32 { | ||
| 293 | SourceColor = 0x0, | ||
| 294 | OneMinusSourceColor = 0x1, | ||
| 295 | SourceAlpha = 0x2, | ||
| 296 | OneMinusSourceAlpha = 0x3, | ||
| 297 | SourceRed = 0x4, | ||
| 298 | OneMinusSourceRed = 0x5, | ||
| 299 | |||
| 300 | SourceGreen = 0x8, | ||
| 301 | OneMinusSourceGreen = 0x9, | ||
| 302 | |||
| 303 | SourceBlue = 0xc, | ||
| 304 | OneMinusSourceBlue = 0xd, | ||
| 305 | }; | ||
| 306 | |||
| 307 | enum class AlphaModifier : u32 { | ||
| 308 | SourceAlpha = 0x0, | ||
| 309 | OneMinusSourceAlpha = 0x1, | ||
| 310 | SourceRed = 0x2, | ||
| 311 | OneMinusSourceRed = 0x3, | ||
| 312 | SourceGreen = 0x4, | ||
| 313 | OneMinusSourceGreen = 0x5, | ||
| 314 | SourceBlue = 0x6, | ||
| 315 | OneMinusSourceBlue = 0x7, | ||
| 316 | }; | ||
| 317 | |||
| 318 | enum class Operation : u32 { | ||
| 319 | Replace = 0, | ||
| 320 | Modulate = 1, | ||
| 321 | Add = 2, | ||
| 322 | AddSigned = 3, | ||
| 323 | Lerp = 4, | ||
| 324 | Subtract = 5, | ||
| 325 | Dot3_RGB = 6, | ||
| 326 | Dot3_RGBA = 7, | ||
| 327 | MultiplyThenAdd = 8, | ||
| 328 | AddThenMultiply = 9, | ||
| 329 | }; | ||
| 330 | |||
| 331 | union { | ||
| 332 | u32 sources_raw; | ||
| 333 | BitField<0, 4, Source> color_source1; | ||
| 334 | BitField<4, 4, Source> color_source2; | ||
| 335 | BitField<8, 4, Source> color_source3; | ||
| 336 | BitField<16, 4, Source> alpha_source1; | ||
| 337 | BitField<20, 4, Source> alpha_source2; | ||
| 338 | BitField<24, 4, Source> alpha_source3; | ||
| 339 | }; | ||
| 340 | |||
| 341 | union { | ||
| 342 | u32 modifiers_raw; | ||
| 343 | BitField<0, 4, ColorModifier> color_modifier1; | ||
| 344 | BitField<4, 4, ColorModifier> color_modifier2; | ||
| 345 | BitField<8, 4, ColorModifier> color_modifier3; | ||
| 346 | BitField<12, 3, AlphaModifier> alpha_modifier1; | ||
| 347 | BitField<16, 3, AlphaModifier> alpha_modifier2; | ||
| 348 | BitField<20, 3, AlphaModifier> alpha_modifier3; | ||
| 349 | }; | ||
| 350 | |||
| 351 | union { | ||
| 352 | u32 ops_raw; | ||
| 353 | BitField<0, 4, Operation> color_op; | ||
| 354 | BitField<16, 4, Operation> alpha_op; | ||
| 355 | }; | ||
| 356 | |||
| 357 | union { | ||
| 358 | u32 const_color; | ||
| 359 | BitField<0, 8, u32> const_r; | ||
| 360 | BitField<8, 8, u32> const_g; | ||
| 361 | BitField<16, 8, u32> const_b; | ||
| 362 | BitField<24, 8, u32> const_a; | ||
| 363 | }; | ||
| 364 | |||
| 365 | union { | ||
| 366 | u32 scales_raw; | ||
| 367 | BitField<0, 2, u32> color_scale; | ||
| 368 | BitField<16, 2, u32> alpha_scale; | ||
| 369 | }; | ||
| 370 | |||
| 371 | inline unsigned GetColorMultiplier() const { | ||
| 372 | return (color_scale < 3) ? (1 << color_scale) : 1; | ||
| 373 | } | ||
| 374 | |||
| 375 | inline unsigned GetAlphaMultiplier() const { | ||
| 376 | return (alpha_scale < 3) ? (1 << alpha_scale) : 1; | ||
| 377 | } | ||
| 378 | }; | ||
| 379 | |||
| 380 | TevStageConfig tev_stage0; | ||
| 381 | INSERT_PADDING_WORDS(0x3); | ||
| 382 | TevStageConfig tev_stage1; | ||
| 383 | INSERT_PADDING_WORDS(0x3); | ||
| 384 | TevStageConfig tev_stage2; | ||
| 385 | INSERT_PADDING_WORDS(0x3); | ||
| 386 | TevStageConfig tev_stage3; | ||
| 387 | INSERT_PADDING_WORDS(0x3); | ||
| 388 | |||
| 389 | enum class FogMode : u32 { | ||
| 390 | None = 0, | ||
| 391 | Fog = 5, | ||
| 392 | Gas = 7, | ||
| 393 | }; | ||
| 394 | |||
| 395 | union { | ||
| 396 | BitField<0, 3, FogMode> fog_mode; | ||
| 397 | BitField<16, 1, u32> fog_flip; | ||
| 398 | |||
| 399 | union { | ||
| 400 | // Tev stages 0-3 write their output to the combiner buffer if the corresponding bit in | ||
| 401 | // these masks are set | ||
| 402 | BitField<8, 4, u32> update_mask_rgb; | ||
| 403 | BitField<12, 4, u32> update_mask_a; | ||
| 404 | |||
| 405 | bool TevStageUpdatesCombinerBufferColor(unsigned stage_index) const { | ||
| 406 | return (stage_index < 4) && (update_mask_rgb & (1 << stage_index)); | ||
| 407 | } | ||
| 408 | |||
| 409 | bool TevStageUpdatesCombinerBufferAlpha(unsigned stage_index) const { | ||
| 410 | return (stage_index < 4) && (update_mask_a & (1 << stage_index)); | ||
| 411 | } | ||
| 412 | } tev_combiner_buffer_input; | ||
| 413 | }; | ||
| 414 | |||
| 415 | union { | ||
| 416 | u32 raw; | ||
| 417 | BitField<0, 8, u32> r; | ||
| 418 | BitField<8, 8, u32> g; | ||
| 419 | BitField<16, 8, u32> b; | ||
| 420 | } fog_color; | ||
| 421 | |||
| 422 | INSERT_PADDING_WORDS(0x4); | ||
| 423 | |||
| 424 | BitField<0, 16, u32> fog_lut_offset; | ||
| 425 | |||
| 426 | INSERT_PADDING_WORDS(0x1); | ||
| 427 | |||
| 428 | u32 fog_lut_data[8]; | ||
| 429 | |||
| 430 | TevStageConfig tev_stage4; | ||
| 431 | INSERT_PADDING_WORDS(0x3); | ||
| 432 | TevStageConfig tev_stage5; | ||
| 433 | |||
| 434 | union { | ||
| 435 | u32 raw; | ||
| 436 | BitField<0, 8, u32> r; | ||
| 437 | BitField<8, 8, u32> g; | ||
| 438 | BitField<16, 8, u32> b; | ||
| 439 | BitField<24, 8, u32> a; | ||
| 440 | } tev_combiner_buffer_color; | ||
| 441 | |||
| 442 | INSERT_PADDING_WORDS(0x2); | ||
| 443 | |||
| 444 | const std::array<TevStageConfig, 6> GetTevStages() const { | ||
| 445 | return {{tev_stage0, tev_stage1, tev_stage2, tev_stage3, tev_stage4, tev_stage5}}; | ||
| 446 | }; | ||
| 447 | }; | ||
| 448 | |||
| 449 | static_assert(sizeof(TexturingRegs) == 0x80 * sizeof(u32), | ||
| 450 | "TexturingRegs struct has incorrect size"); | ||
| 451 | |||
| 452 | } // namespace Pica | ||