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| author | 2018-09-10 18:02:47 -0400 | |
|---|---|---|
| committer | 2018-09-10 18:02:47 -0400 | |
| commit | ae0c95efccfb85c0456194d142f561cbd5f95df8 (patch) | |
| tree | 224018fc0aed7e56980e2bf9e063f3770b99539e /src/video_core/gpu.h | |
| parent | Merge pull request #1281 from bunnei/multi-rt (diff) | |
| parent | video_core: Refactor command_processor. (diff) | |
| download | yuzu-ae0c95efccfb85c0456194d142f561cbd5f95df8.tar.gz yuzu-ae0c95efccfb85c0456194d142f561cbd5f95df8.tar.xz yuzu-ae0c95efccfb85c0456194d142f561cbd5f95df8.zip | |
Merge pull request #1264 from degasus/optimizations
video_core: Optimize the command processor.
Diffstat (limited to 'src/video_core/gpu.h')
| -rw-r--r-- | src/video_core/gpu.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h index d29f31f52..4f71f99d7 100644 --- a/src/video_core/gpu.h +++ b/src/video_core/gpu.h | |||
| @@ -6,6 +6,7 @@ | |||
| 6 | 6 | ||
| 7 | #include <array> | 7 | #include <array> |
| 8 | #include <memory> | 8 | #include <memory> |
| 9 | #include <vector> | ||
| 9 | #include "common/common_types.h" | 10 | #include "common/common_types.h" |
| 10 | #include "core/hle/service/nvflinger/buffer_queue.h" | 11 | #include "core/hle/service/nvflinger/buffer_queue.h" |
| 11 | #include "video_core/memory_manager.h" | 12 | #include "video_core/memory_manager.h" |
| @@ -67,6 +68,7 @@ u32 RenderTargetBytesPerPixel(RenderTargetFormat format); | |||
| 67 | /// Returns the number of bytes per pixel of each depth format. | 68 | /// Returns the number of bytes per pixel of each depth format. |
| 68 | u32 DepthFormatBytesPerPixel(DepthFormat format); | 69 | u32 DepthFormatBytesPerPixel(DepthFormat format); |
| 69 | 70 | ||
| 71 | struct CommandListHeader; | ||
| 70 | class DebugContext; | 72 | class DebugContext; |
| 71 | 73 | ||
| 72 | /** | 74 | /** |
| @@ -115,7 +117,7 @@ public: | |||
| 115 | ~GPU(); | 117 | ~GPU(); |
| 116 | 118 | ||
| 117 | /// Processes a command list stored at the specified address in GPU memory. | 119 | /// Processes a command list stored at the specified address in GPU memory. |
| 118 | void ProcessCommandList(GPUVAddr address, u32 size); | 120 | void ProcessCommandLists(const std::vector<CommandListHeader>& commands); |
| 119 | 121 | ||
| 120 | /// Returns a reference to the Maxwell3D GPU engine. | 122 | /// Returns a reference to the Maxwell3D GPU engine. |
| 121 | Engines::Maxwell3D& Maxwell3D(); | 123 | Engines::Maxwell3D& Maxwell3D(); |
| @@ -130,9 +132,6 @@ public: | |||
| 130 | const Tegra::MemoryManager& MemoryManager() const; | 132 | const Tegra::MemoryManager& MemoryManager() const; |
| 131 | 133 | ||
| 132 | private: | 134 | private: |
| 133 | /// Writes a single register in the engine bound to the specified subchannel | ||
| 134 | void WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params); | ||
| 135 | |||
| 136 | std::unique_ptr<Tegra::MemoryManager> memory_manager; | 135 | std::unique_ptr<Tegra::MemoryManager> memory_manager; |
| 137 | 136 | ||
| 138 | /// Mapping of command subchannels to their bound engine ids. | 137 | /// Mapping of command subchannels to their bound engine ids. |