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authorGravatar Subv2018-06-06 12:58:16 -0500
committerGravatar Subv2018-06-06 12:58:16 -0500
commitdbfc39d21492dd1346b0e0d7ab5a2dbd989432bd (patch)
treefa95ce57c5f16a01b766efe2b49ed90888800e3d /src/video_core/engines
parentnvdrv/devices/nvidia_ctrl_gpu : add IoctlCommands with their params (#524) (diff)
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GPU: Implement sampling multiple textures in the generated glsl shaders.
All tested games that use a single texture show no regression. Only Texture2D textures are supported right now, each shader gets its own "tex_fs/vs/gs" sampler array to maintain independent textures between shader stages, the textures themselves are reused if possible.
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/maxwell_3d.cpp34
-rw-r--r--src/video_core/engines/maxwell_3d.h3
2 files changed, 37 insertions, 0 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index ef12d9300..86e9dc998 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -354,6 +354,40 @@ std::vector<Texture::FullTextureInfo> Maxwell3D::GetStageTextures(Regs::ShaderSt
354 return textures; 354 return textures;
355} 355}
356 356
357Texture::FullTextureInfo Maxwell3D::GetStageTexture(Regs::ShaderStage stage, size_t offset) const {
358 auto& shader = state.shader_stages[static_cast<size_t>(stage)];
359 auto& tex_info_buffer = shader.const_buffers[regs.tex_cb_index];
360 ASSERT(tex_info_buffer.enabled && tex_info_buffer.address != 0);
361
362 GPUVAddr tex_info_address = tex_info_buffer.address + offset * sizeof(Texture::TextureHandle);
363
364 ASSERT(tex_info_address < tex_info_buffer.address + tex_info_buffer.size);
365
366 boost::optional<VAddr> tex_address_cpu = memory_manager.GpuToCpuAddress(tex_info_address);
367 Texture::TextureHandle tex_handle{Memory::Read32(*tex_address_cpu)};
368
369 Texture::FullTextureInfo tex_info{};
370 tex_info.index = static_cast<u32>(offset);
371
372 // Load the TIC data.
373 if (tex_handle.tic_id != 0) {
374 tex_info.enabled = true;
375
376 auto tic_entry = GetTICEntry(tex_handle.tic_id);
377 // TODO(Subv): Workaround for BitField's move constructor being deleted.
378 std::memcpy(&tex_info.tic, &tic_entry, sizeof(tic_entry));
379 }
380
381 // Load the TSC data
382 if (tex_handle.tsc_id != 0) {
383 auto tsc_entry = GetTSCEntry(tex_handle.tsc_id);
384 // TODO(Subv): Workaround for BitField's move constructor being deleted.
385 std::memcpy(&tex_info.tsc, &tsc_entry, sizeof(tsc_entry));
386 }
387
388 return tex_info;
389}
390
357u32 Maxwell3D::GetRegisterValue(u32 method) const { 391u32 Maxwell3D::GetRegisterValue(u32 method) const {
358 ASSERT_MSG(method < Regs::NUM_REGS, "Invalid Maxwell3D register"); 392 ASSERT_MSG(method < Regs::NUM_REGS, "Invalid Maxwell3D register");
359 return regs.reg_array[method]; 393 return regs.reg_array[method];
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 245410c95..56b837372 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -664,6 +664,9 @@ public:
664 /// Returns a list of enabled textures for the specified shader stage. 664 /// Returns a list of enabled textures for the specified shader stage.
665 std::vector<Texture::FullTextureInfo> GetStageTextures(Regs::ShaderStage stage) const; 665 std::vector<Texture::FullTextureInfo> GetStageTextures(Regs::ShaderStage stage) const;
666 666
667 /// Returns the texture information for a specific texture in a specific shader stage.
668 Texture::FullTextureInfo GetStageTexture(Regs::ShaderStage stage, size_t offset) const;
669
667 /// Returns whether the specified shader stage is enabled or not. 670 /// Returns whether the specified shader stage is enabled or not.
668 bool IsShaderStageEnabled(Regs::ShaderStage stage) const; 671 bool IsShaderStageEnabled(Regs::ShaderStage stage) const;
669 672