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| author | 2019-12-18 19:26:52 -0300 | |
|---|---|---|
| committer | 2019-12-18 19:28:23 -0300 | |
| commit | da0aa4da6bc853c7afcc735a1cb68917feeefd42 (patch) | |
| tree | 62a52db6d684ed7acbbb065c33193a0b382ddacb /src/video_core/engines | |
| parent | Merge pull request #3173 from yuzu-emu/bunnei-spscqueue (diff) | |
| download | yuzu-da0aa4da6bc853c7afcc735a1cb68917feeefd42.tar.gz yuzu-da0aa4da6bc853c7afcc735a1cb68917feeefd42.tar.xz yuzu-da0aa4da6bc853c7afcc735a1cb68917feeefd42.zip | |
gl_rasterizer: Implement RASTERIZE_ENABLE
RASTERIZE_ENABLE is the opposite of GL_RASTERIZER_DISCARD. Implement it
naturally using this.
NVN games expect rasterize to be enabled by default, reflect that in our
initial GPU state.
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 6 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 7 |
2 files changed, 9 insertions, 4 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 15a7a9d6a..e1cb8b0b0 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp | |||
| @@ -88,11 +88,11 @@ void Maxwell3D::InitializeRegisterDefaults() { | |||
| 88 | color_mask.A.Assign(1); | 88 | color_mask.A.Assign(1); |
| 89 | } | 89 | } |
| 90 | 90 | ||
| 91 | // Commercial games seem to assume this value is enabled and nouveau sets this value manually. | 91 | // NVN games expect these values to be enabled at boot |
| 92 | regs.rasterize_enable = 1; | ||
| 92 | regs.rt_separate_frag_data = 1; | 93 | regs.rt_separate_frag_data = 1; |
| 93 | |||
| 94 | // Some games (like Super Mario Odyssey) assume that SRGB is enabled. | ||
| 95 | regs.framebuffer_srgb = 1; | 94 | regs.framebuffer_srgb = 1; |
| 95 | |||
| 96 | mme_inline[MAXWELL3D_REG_INDEX(draw.vertex_end_gl)] = true; | 96 | mme_inline[MAXWELL3D_REG_INDEX(draw.vertex_end_gl)] = true; |
| 97 | mme_inline[MAXWELL3D_REG_INDEX(draw.vertex_begin_gl)] = true; | 97 | mme_inline[MAXWELL3D_REG_INDEX(draw.vertex_begin_gl)] = true; |
| 98 | mme_inline[MAXWELL3D_REG_INDEX(vertex_buffer.count)] = true; | 98 | mme_inline[MAXWELL3D_REG_INDEX(vertex_buffer.count)] = true; |
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index dbb4e597f..870b359be 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -657,7 +657,11 @@ public: | |||
| 657 | std::array<f32, 4> tess_level_outer; | 657 | std::array<f32, 4> tess_level_outer; |
| 658 | std::array<f32, 2> tess_level_inner; | 658 | std::array<f32, 2> tess_level_inner; |
| 659 | 659 | ||
| 660 | INSERT_UNION_PADDING_WORDS(0x102); | 660 | INSERT_UNION_PADDING_WORDS(0x10); |
| 661 | |||
| 662 | u32 rasterize_enable; | ||
| 663 | |||
| 664 | INSERT_UNION_PADDING_WORDS(0xF1); | ||
| 661 | 665 | ||
| 662 | u32 tfb_enabled; | 666 | u32 tfb_enabled; |
| 663 | 667 | ||
| @@ -1420,6 +1424,7 @@ ASSERT_REG_POSITION(sync_info, 0xB2); | |||
| 1420 | ASSERT_REG_POSITION(tess_mode, 0xC8); | 1424 | ASSERT_REG_POSITION(tess_mode, 0xC8); |
| 1421 | ASSERT_REG_POSITION(tess_level_outer, 0xC9); | 1425 | ASSERT_REG_POSITION(tess_level_outer, 0xC9); |
| 1422 | ASSERT_REG_POSITION(tess_level_inner, 0xCD); | 1426 | ASSERT_REG_POSITION(tess_level_inner, 0xCD); |
| 1427 | ASSERT_REG_POSITION(rasterize_enable, 0xDF); | ||
| 1423 | ASSERT_REG_POSITION(tfb_enabled, 0x1D1); | 1428 | ASSERT_REG_POSITION(tfb_enabled, 0x1D1); |
| 1424 | ASSERT_REG_POSITION(rt, 0x200); | 1429 | ASSERT_REG_POSITION(rt, 0x200); |
| 1425 | ASSERT_REG_POSITION(viewport_transform, 0x280); | 1430 | ASSERT_REG_POSITION(viewport_transform, 0x280); |