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| author | 2018-08-19 13:19:16 -0400 | |
|---|---|---|
| committer | 2018-08-19 13:19:16 -0400 | |
| commit | d6cb22b0df4e2b785827830e7af605477acbc9b4 (patch) | |
| tree | 8b86c1cf73dbfb0d05013886f3e99b61cdb2ec67 /src/video_core/engines | |
| parent | Merge pull request #838 from FearlessTobi/port-3616 (diff) | |
| parent | Shader: Implemented the predicate and mode arguments of LOP. (diff) | |
| download | yuzu-d6cb22b0df4e2b785827830e7af605477acbc9b4.tar.gz yuzu-d6cb22b0df4e2b785827830e7af605477acbc9b4.tar.xz yuzu-d6cb22b0df4e2b785827830e7af605477acbc9b4.zip | |
Merge pull request #1103 from Subv/lop_pred
Shader: Implemented the predicate and mode arguments of LOP.
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index b038a9d92..6cfb9c5f8 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h | |||
| @@ -214,6 +214,11 @@ enum class FlowCondition : u64 { | |||
| 214 | Fcsm_Tr = 0x1C, // TODO(bunnei): What is this used for? | 214 | Fcsm_Tr = 0x1C, // TODO(bunnei): What is this used for? |
| 215 | }; | 215 | }; |
| 216 | 216 | ||
| 217 | enum class PredicateResultMode : u64 { | ||
| 218 | None = 0x0, | ||
| 219 | NotZero = 0x3, | ||
| 220 | }; | ||
| 221 | |||
| 217 | union Instruction { | 222 | union Instruction { |
| 218 | Instruction& operator=(const Instruction& instr) { | 223 | Instruction& operator=(const Instruction& instr) { |
| 219 | value = instr.value; | 224 | value = instr.value; |
| @@ -254,7 +259,7 @@ union Instruction { | |||
| 254 | BitField<39, 1, u64> invert_a; | 259 | BitField<39, 1, u64> invert_a; |
| 255 | BitField<40, 1, u64> invert_b; | 260 | BitField<40, 1, u64> invert_b; |
| 256 | BitField<41, 2, LogicOperation> operation; | 261 | BitField<41, 2, LogicOperation> operation; |
| 257 | BitField<44, 2, u64> unk44; | 262 | BitField<44, 2, PredicateResultMode> pred_result_mode; |
| 258 | BitField<48, 3, Pred> pred48; | 263 | BitField<48, 3, Pred> pred48; |
| 259 | } lop; | 264 | } lop; |
| 260 | 265 | ||