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authorGravatar David Marcec2018-09-01 16:34:27 +1000
committerGravatar David Marcec2018-09-01 16:34:27 +1000
commitad3dca7e62373fe9d7df50414178fe65322e6a06 (patch)
tree640c076e8a3d49960f07d8ce6a53449e0a9523df /src/video_core/engines
parentMerge pull request #1196 from FearlessTobi/ccache-consistency (diff)
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Added better asserts to IPA, Renamed IPA modes to match mesa
IpaMode is changed to IpaInterpMode IpaMode is suppose to be 2 bits not 3 Added IpaSampleMode Added Saturate Renamed modes based on https://github.com/mesa3d/mesa/blob/d27c7918916cdc8092959124955f887592e37d72/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp#L2530
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/shader_bytecode.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index 3e4efbe0c..2707ce3a2 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -243,7 +243,8 @@ enum class TextureType : u64 {
243 TextureCube = 3, 243 TextureCube = 3,
244}; 244};
245 245
246enum class IpaMode : u64 { Pass = 0, None = 1, Constant = 2, Sc = 3 }; 246enum class IpaInterpMode : u64 { Linear = 0, Perspective = 1, Flat = 2, Sc = 3 };
247enum class IpaSampleMode : u64 { Default = 0, Centroid = 1, Offset = 2 };
247 248
248union Instruction { 249union Instruction {
249 Instruction& operator=(const Instruction& instr) { 250 Instruction& operator=(const Instruction& instr) {
@@ -328,7 +329,9 @@ union Instruction {
328 } alu; 329 } alu;
329 330
330 union { 331 union {
331 BitField<54, 3, IpaMode> mode; 332 BitField<51, 1, u64> saturate;
333 BitField<52, 2, IpaSampleMode> sample_mode;
334 BitField<54, 2, IpaInterpMode> interp_mode;
332 } ipa; 335 } ipa;
333 336
334 union { 337 union {