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| author | 2018-07-12 22:57:57 -0400 | |
|---|---|---|
| committer | 2018-07-12 22:57:57 -0400 | |
| commit | 8aeff9cf8e84c27ab83cea8df1a94ce8082efc78 (patch) | |
| tree | e79cdf86838e120908b50fd25ad4f48a98bc29e9 /src/video_core/engines | |
| parent | gl_shader_gen: Implement dual vertex shader mode. (diff) | |
| download | yuzu-8aeff9cf8e84c27ab83cea8df1a94ce8082efc78.tar.gz yuzu-8aeff9cf8e84c27ab83cea8df1a94ce8082efc78.tar.xz yuzu-8aeff9cf8e84c27ab83cea8df1a94ce8082efc78.zip | |
gl_rasterizer: Fix check for if a shader stage is enabled.
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 21 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_3d.h | 11 |
2 files changed, 8 insertions, 24 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 3bca16364..dfbf80abd 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp | |||
| @@ -398,27 +398,6 @@ u32 Maxwell3D::GetRegisterValue(u32 method) const { | |||
| 398 | return regs.reg_array[method]; | 398 | return regs.reg_array[method]; |
| 399 | } | 399 | } |
| 400 | 400 | ||
| 401 | bool Maxwell3D::IsShaderStageEnabled(Regs::ShaderStage stage) const { | ||
| 402 | // The Vertex stage is always enabled. | ||
| 403 | if (stage == Regs::ShaderStage::Vertex) | ||
| 404 | return true; | ||
| 405 | |||
| 406 | switch (stage) { | ||
| 407 | case Regs::ShaderStage::TesselationControl: | ||
| 408 | return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::TesselationControl)] | ||
| 409 | .enable != 0; | ||
| 410 | case Regs::ShaderStage::TesselationEval: | ||
| 411 | return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::TesselationEval)] | ||
| 412 | .enable != 0; | ||
| 413 | case Regs::ShaderStage::Geometry: | ||
| 414 | return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::Geometry)].enable != 0; | ||
| 415 | case Regs::ShaderStage::Fragment: | ||
| 416 | return regs.shader_config[static_cast<size_t>(Regs::ShaderProgram::Fragment)].enable != 0; | ||
| 417 | } | ||
| 418 | |||
| 419 | UNREACHABLE(); | ||
| 420 | } | ||
| 421 | |||
| 422 | void Maxwell3D::ProcessClearBuffers() { | 401 | void Maxwell3D::ProcessClearBuffers() { |
| 423 | ASSERT(regs.clear_buffers.R == regs.clear_buffers.G && | 402 | ASSERT(regs.clear_buffers.R == regs.clear_buffers.G && |
| 424 | regs.clear_buffers.R == regs.clear_buffers.B && | 403 | regs.clear_buffers.R == regs.clear_buffers.B && |
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 5a7cf0107..6f0170ff7 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h | |||
| @@ -379,6 +379,14 @@ public: | |||
| 379 | } | 379 | } |
| 380 | }; | 380 | }; |
| 381 | 381 | ||
| 382 | bool IsShaderConfigEnabled(size_t index) const { | ||
| 383 | // The VertexB is always enabled. | ||
| 384 | if (index == static_cast<size_t>(Regs::ShaderProgram::VertexB)) { | ||
| 385 | return true; | ||
| 386 | } | ||
| 387 | return shader_config[index].enable != 0; | ||
| 388 | } | ||
| 389 | |||
| 382 | union { | 390 | union { |
| 383 | struct { | 391 | struct { |
| 384 | INSERT_PADDING_WORDS(0x45); | 392 | INSERT_PADDING_WORDS(0x45); |
| @@ -780,9 +788,6 @@ public: | |||
| 780 | /// Returns the texture information for a specific texture in a specific shader stage. | 788 | /// Returns the texture information for a specific texture in a specific shader stage. |
| 781 | Texture::FullTextureInfo GetStageTexture(Regs::ShaderStage stage, size_t offset) const; | 789 | Texture::FullTextureInfo GetStageTexture(Regs::ShaderStage stage, size_t offset) const; |
| 782 | 790 | ||
| 783 | /// Returns whether the specified shader stage is enabled or not. | ||
| 784 | bool IsShaderStageEnabled(Regs::ShaderStage stage) const; | ||
| 785 | |||
| 786 | private: | 791 | private: |
| 787 | std::unordered_map<u32, std::vector<u32>> uploaded_macros; | 792 | std::unordered_map<u32, std::vector<u32>> uploaded_macros; |
| 788 | 793 | ||