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| author | 2018-07-02 10:13:26 -0600 | |
|---|---|---|
| committer | 2018-07-02 21:45:47 -0400 | |
| commit | 638956aa81de255bf4bbd4e69a717eabf4ceadb9 (patch) | |
| tree | 5783dda790575e047fa757d8c56e11f3fffe7646 /src/video_core/engines | |
| parent | Merge pull request #608 from Subv/depth (diff) | |
| download | yuzu-638956aa81de255bf4bbd4e69a717eabf4ceadb9.tar.gz yuzu-638956aa81de255bf4bbd4e69a717eabf4ceadb9.tar.xz yuzu-638956aa81de255bf4bbd4e69a717eabf4ceadb9.zip | |
Rename logging macro back to LOG_*
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/fermi_2d.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 2 | ||||
| -rw-r--r-- | src/video_core/engines/maxwell_dma.cpp | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/video_core/engines/fermi_2d.cpp b/src/video_core/engines/fermi_2d.cpp index 998b7c843..f9cbab8e2 100644 --- a/src/video_core/engines/fermi_2d.cpp +++ b/src/video_core/engines/fermi_2d.cpp | |||
| @@ -26,7 +26,7 @@ void Fermi2D::WriteReg(u32 method, u32 value) { | |||
| 26 | } | 26 | } |
| 27 | 27 | ||
| 28 | void Fermi2D::HandleSurfaceCopy() { | 28 | void Fermi2D::HandleSurfaceCopy() { |
| 29 | NGLOG_WARNING(HW_GPU, "Requested a surface copy with operation {}", | 29 | LOG_WARNING(HW_GPU, "Requested a surface copy with operation {}", |
| 30 | static_cast<u32>(regs.operation)); | 30 | static_cast<u32>(regs.operation)); |
| 31 | 31 | ||
| 32 | const GPUVAddr source = regs.src.Address(); | 32 | const GPUVAddr source = regs.src.Address(); |
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index 93c43c8cb..bbd34f060 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp | |||
| @@ -207,7 +207,7 @@ void Maxwell3D::ProcessQueryGet() { | |||
| 207 | } | 207 | } |
| 208 | 208 | ||
| 209 | void Maxwell3D::DrawArrays() { | 209 | void Maxwell3D::DrawArrays() { |
| 210 | NGLOG_DEBUG(HW_GPU, "called, topology={}, count={}", | 210 | LOG_DEBUG(HW_GPU, "called, topology={}, count={}", |
| 211 | static_cast<u32>(regs.draw.topology.Value()), regs.vertex_buffer.count); | 211 | static_cast<u32>(regs.draw.topology.Value()), regs.vertex_buffer.count); |
| 212 | ASSERT_MSG(!(regs.index_array.count && regs.vertex_buffer.count), "Both indexed and direct?"); | 212 | ASSERT_MSG(!(regs.index_array.count && regs.vertex_buffer.count), "Both indexed and direct?"); |
| 213 | 213 | ||
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp index c298f0bfb..6e740713f 100644 --- a/src/video_core/engines/maxwell_dma.cpp +++ b/src/video_core/engines/maxwell_dma.cpp | |||
| @@ -31,7 +31,7 @@ void MaxwellDMA::WriteReg(u32 method, u32 value) { | |||
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | void MaxwellDMA::HandleCopy() { | 33 | void MaxwellDMA::HandleCopy() { |
| 34 | NGLOG_WARNING(HW_GPU, "Requested a DMA copy"); | 34 | LOG_WARNING(HW_GPU, "Requested a DMA copy"); |
| 35 | 35 | ||
| 36 | const GPUVAddr source = regs.src_address.Address(); | 36 | const GPUVAddr source = regs.src_address.Address(); |
| 37 | const GPUVAddr dest = regs.dst_address.Address(); | 37 | const GPUVAddr dest = regs.dst_address.Address(); |