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authorGravatar bunnei2019-01-29 22:02:01 -0500
committerGravatar GitHub2019-01-29 22:02:01 -0500
commit52bb5245268e113bfacc4c4bb27a74ea3058adbc (patch)
tree4ba30f0ad404bd4120dd5b2e4f21193bf03952fd /src/video_core/engines
parentvideo_core/GPU Implemented the GPU PFIFO puller semaphore operations. (#1908) (diff)
parentgl_rasterizer: Implement global memory management (diff)
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Merge pull request #1960 from ReinUsesLisp/shader-ir-ldg
video_core: Implement LDG through heuristics based on IR
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/shader_bytecode.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index cdef97bc6..9989825f8 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -208,6 +208,8 @@ enum class UniformType : u64 {
208 SignedShort = 3, 208 SignedShort = 3,
209 Single = 4, 209 Single = 4,
210 Double = 5, 210 Double = 5,
211 Quad = 6,
212 UnsignedQuad = 7,
211}; 213};
212 214
213enum class StoreType : u64 { 215enum class StoreType : u64 {
@@ -785,6 +787,12 @@ union Instruction {
785 } st_l; 787 } st_l;
786 788
787 union { 789 union {
790 BitField<48, 3, UniformType> type;
791 BitField<46, 2, u64> cache_mode;
792 BitField<20, 24, s64> immediate_offset;
793 } ldg;
794
795 union {
788 BitField<0, 3, u64> pred0; 796 BitField<0, 3, u64> pred0;
789 BitField<3, 3, u64> pred3; 797 BitField<3, 3, u64> pred3;
790 BitField<7, 1, u64> abs_a; 798 BitField<7, 1, u64> abs_a;