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authorGravatar bunnei2018-06-05 23:46:23 -0400
committerGravatar bunnei2018-06-06 18:09:06 -0400
commit4669f15f8be26ddf3c1cc02d8aac78656c41d361 (patch)
tree3e6968e43a2377a0bfd8bb45f3ea8141f9bd0568 /src/video_core/engines
parentgl_shader_gen: Add uniform handling for indirect const buffer access. (diff)
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gl_shader_decompiler: Implement LD_C instruction.
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/shader_bytecode.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index 7a74771ce..af18c2d81 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -175,6 +175,15 @@ enum class FloatRoundingOp : u64 {
175 Trunc = 3, 175 Trunc = 3,
176}; 176};
177 177
178enum class UniformType : u64 {
179 UnsignedByte = 0,
180 SignedByte = 1,
181 UnsignedShort = 2,
182 SignedShort = 3,
183 Single = 4,
184 Double = 5,
185};
186
178union Instruction { 187union Instruction {
179 Instruction& operator=(const Instruction& instr) { 188 Instruction& operator=(const Instruction& instr) {
180 value = instr.value; 189 value = instr.value;
@@ -253,6 +262,11 @@ union Instruction {
253 } ffma; 262 } ffma;
254 263
255 union { 264 union {
265 BitField<48, 3, UniformType> type;
266 BitField<44, 2, u64> unknown;
267 } ld_c;
268
269 union {
256 BitField<0, 3, u64> pred0; 270 BitField<0, 3, u64> pred0;
257 BitField<3, 3, u64> pred3; 271 BitField<3, 3, u64> pred3;
258 BitField<7, 1, u64> abs_a; 272 BitField<7, 1, u64> abs_a;
@@ -378,6 +392,7 @@ public:
378 KIL, 392 KIL,
379 BRA, 393 BRA,
380 LD_A, 394 LD_A,
395 LD_C,
381 ST_A, 396 ST_A,
382 TEX, 397 TEX,
383 TEXQ, // Texture Query 398 TEXQ, // Texture Query
@@ -552,6 +567,7 @@ private:
552 INST("111000110011----", Id::KIL, Type::Flow, "KIL"), 567 INST("111000110011----", Id::KIL, Type::Flow, "KIL"),
553 INST("111000100100----", Id::BRA, Type::Flow, "BRA"), 568 INST("111000100100----", Id::BRA, Type::Flow, "BRA"),
554 INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"), 569 INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
570 INST("1110111110010---", Id::LD_C, Type::Memory, "LD_C"),
555 INST("1110111111110---", Id::ST_A, Type::Memory, "ST_A"), 571 INST("1110111111110---", Id::ST_A, Type::Memory, "ST_A"),
556 INST("1100000000111---", Id::TEX, Type::Memory, "TEX"), 572 INST("1100000000111---", Id::TEX, Type::Memory, "TEX"),
557 INST("1101111101001---", Id::TEXQ, Type::Memory, "TEXQ"), 573 INST("1101111101001---", Id::TEXQ, Type::Memory, "TEXQ"),