kepler_compute: Fixup assert and rename engines

When I originally added the compute assert I used the wrong
documentation. This addresses that.

The dispatch register was tested with homebrew against hardware and is
triggered by some games (e.g. Super Mario Odyssey). What exactly is
missing to get a valid program bound by this engine requires more
investigation.

3 files changed, 50 insertions, 43 deletions

diff --git a/src/video_core/engines/kepler_compute.cpp b/src/video_core/engines/kepler_compute.cpp
new file mode 100644
index 000000000..4ca856b6b
--- /dev/null
+++ b/src/video_core/engines/kepler_compute.cpp
@@ -0,0 +1,34 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "common/logging/log.h"
+#include "core/core.h"
+#include "core/memory.h"
+#include "video_core/engines/kepler_compute.h"
+#include "video_core/memory_manager.h"
+
+namespace Tegra::Engines {
+
+KeplerCompute::KeplerCompute(MemoryManager& memory_manager) : memory_manager{memory_manager} {}
+
+KeplerCompute::~KeplerCompute() = default;
+
+void KeplerCompute::CallMethod(const GPU::MethodCall& method_call) {
+    ASSERT_MSG(method_call.method < Regs::NUM_REGS,
+               "Invalid KeplerCompute register, increase the size of the Regs structure");
+
+    regs.reg_array[method_call.method] = method_call.argument;
+
+    switch (method_call.method) {
+    case KEPLER_COMPUTE_REG_INDEX(launch):
+        // Abort execution since compute shaders can be used to alter game memory (e.g. CUDA
+        // kernels)
+        UNREACHABLE_MSG("Compute shaders are not implemented");
+        break;
+    default:
+        break;
+    }
+}
+
+} // namespace Tegra::Engines
diff --git a/src/video_core/engines/maxwell_compute.h b/src/video_core/engines/kepler_compute.h
index 1d71f11bd..df0a32e0f 100644
--- a/src/video_core/engines/maxwell_compute.h
+++ b/src/video_core/engines/kepler_compute.h
@@ -10,47 +10,48 @@
 #include "common/common_funcs.h"
 #include "common/common_types.h"
 #include "video_core/gpu.h"
+#include "video_core/memory_manager.h"
 
 namespace Tegra::Engines {
 
-#define MAXWELL_COMPUTE_REG_INDEX(field_name)                                                      \
-    (offsetof(Tegra::Engines::MaxwellCompute::Regs, field_name) / sizeof(u32))
+#define KEPLER_COMPUTE_REG_INDEX(field_name)                                                       \
+    (offsetof(Tegra::Engines::KeplerCompute::Regs, field_name) / sizeof(u32))
 
-class MaxwellCompute final {
+class KeplerCompute final {
 public:
-    MaxwellCompute() = default;
-    ~MaxwellCompute() = default;
+    explicit KeplerCompute(MemoryManager& memory_manager);
+    ~KeplerCompute();
+
+    static constexpr std::size_t NumConstBuffers = 8;
 
     struct Regs {
         static constexpr std::size_t NUM_REGS = 0xCF8;
 
         union {
             struct {
-                INSERT_PADDING_WORDS(0x281);
+                INSERT_PADDING_WORDS(0xAF);
 
-                union {
-                    u32 compute_end;
-                    BitField<0, 1, u32> unknown;
-                } compute;
+                u32 launch;
 
-                INSERT_PADDING_WORDS(0xA76);
+                INSERT_PADDING_WORDS(0xC48);
             };
             std::array<u32, NUM_REGS> reg_array;
         };
     } regs{};
-
     static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32),
-                  "MaxwellCompute Regs has wrong size");
+                  "KeplerCompute Regs has wrong size");
+
+    MemoryManager& memory_manager;
 
     /// Write the value to the register identified by method.
     void CallMethod(const GPU::MethodCall& method_call);
 };
 
 #define ASSERT_REG_POSITION(field_name, position)                                                  \
-    static_assert(offsetof(MaxwellCompute::Regs, field_name) == position * 4,                      \
+    static_assert(offsetof(KeplerCompute::Regs, field_name) == position * 4,                       \
                   "Field " #field_name " has invalid position")
 
-ASSERT_REG_POSITION(compute, 0x281);
+ASSERT_REG_POSITION(launch, 0xAF);
 
 #undef ASSERT_REG_POSITION
 
diff --git a/src/video_core/engines/maxwell_compute.cpp b/src/video_core/engines/maxwell_compute.cpp
deleted file mode 100644
index 656db6a61..000000000
--- a/src/video_core/engines/maxwell_compute.cpp
+++ /dev/null
@@ -1,28 +0,0 @@
-// Copyright 2018 yuzu Emulator Project
-// Licensed under GPLv2 or any later version
-// Refer to the license.txt file included.
-
-#include "common/logging/log.h"
-#include "core/core.h"
-#include "video_core/engines/maxwell_compute.h"
-
-namespace Tegra::Engines {
-
-void MaxwellCompute::CallMethod(const GPU::MethodCall& method_call) {
-    ASSERT_MSG(method_call.method < Regs::NUM_REGS,
-               "Invalid MaxwellCompute register, increase the size of the Regs structure");
-
-    regs.reg_array[method_call.method] = method_call.argument;
-
-    switch (method_call.method) {
-    case MAXWELL_COMPUTE_REG_INDEX(compute): {
-        LOG_CRITICAL(HW_GPU, "Compute shaders are not implemented");
-        UNREACHABLE();
-        break;
-    }
-    default:
-        break;
-    }
-}
-
-} // namespace Tegra::Engines