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| author | 2022-10-06 21:29:53 +0200 | |
|---|---|---|
| committer | 2022-10-06 21:29:53 +0200 | |
| commit | 1effa578f12f79d7816e3543291f302f126cc1d2 (patch) | |
| tree | 14803b31b6817294d40d57446f6fa94c5ff3fe9a /src/video_core/dma_pusher.cpp | |
| parent | Merge pull request #9025 from FernandoS27/slava-ukrayini (diff) | |
| parent | vulkan_blitter: Fix pool allocation double free. (diff) | |
| download | yuzu-1effa578f12f79d7816e3543291f302f126cc1d2.tar.gz yuzu-1effa578f12f79d7816e3543291f302f126cc1d2.tar.xz yuzu-1effa578f12f79d7816e3543291f302f126cc1d2.zip | |
Merge pull request #8467 from FernandoS27/yfc-rel-1
Project yuzu Fried Chicken (Y.F.C.) Part 1
Diffstat (limited to 'src/video_core/dma_pusher.cpp')
| -rw-r--r-- | src/video_core/dma_pusher.cpp | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/src/video_core/dma_pusher.cpp b/src/video_core/dma_pusher.cpp index 29b8582ab..9835e3ac1 100644 --- a/src/video_core/dma_pusher.cpp +++ b/src/video_core/dma_pusher.cpp | |||
| @@ -12,7 +12,10 @@ | |||
| 12 | 12 | ||
| 13 | namespace Tegra { | 13 | namespace Tegra { |
| 14 | 14 | ||
| 15 | DmaPusher::DmaPusher(Core::System& system_, GPU& gpu_) : gpu{gpu_}, system{system_} {} | 15 | DmaPusher::DmaPusher(Core::System& system_, GPU& gpu_, MemoryManager& memory_manager_, |
| 16 | Control::ChannelState& channel_state_) | ||
| 17 | : gpu{gpu_}, system{system_}, memory_manager{memory_manager_}, puller{gpu_, memory_manager_, | ||
| 18 | *this, channel_state_} {} | ||
| 16 | 19 | ||
| 17 | DmaPusher::~DmaPusher() = default; | 20 | DmaPusher::~DmaPusher() = default; |
| 18 | 21 | ||
| @@ -21,8 +24,6 @@ MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128, | |||
| 21 | void DmaPusher::DispatchCalls() { | 24 | void DmaPusher::DispatchCalls() { |
| 22 | MICROPROFILE_SCOPE(DispatchCalls); | 25 | MICROPROFILE_SCOPE(DispatchCalls); |
| 23 | 26 | ||
| 24 | gpu.SyncGuestHost(); | ||
| 25 | |||
| 26 | dma_pushbuffer_subindex = 0; | 27 | dma_pushbuffer_subindex = 0; |
| 27 | 28 | ||
| 28 | dma_state.is_last_call = true; | 29 | dma_state.is_last_call = true; |
| @@ -33,7 +34,6 @@ void DmaPusher::DispatchCalls() { | |||
| 33 | } | 34 | } |
| 34 | } | 35 | } |
| 35 | gpu.FlushCommands(); | 36 | gpu.FlushCommands(); |
| 36 | gpu.SyncGuestHost(); | ||
| 37 | gpu.OnCommandListEnd(); | 37 | gpu.OnCommandListEnd(); |
| 38 | } | 38 | } |
| 39 | 39 | ||
| @@ -76,11 +76,11 @@ bool DmaPusher::Step() { | |||
| 76 | // Push buffer non-empty, read a word | 76 | // Push buffer non-empty, read a word |
| 77 | command_headers.resize(command_list_header.size); | 77 | command_headers.resize(command_list_header.size); |
| 78 | if (Settings::IsGPULevelHigh()) { | 78 | if (Settings::IsGPULevelHigh()) { |
| 79 | gpu.MemoryManager().ReadBlock(dma_get, command_headers.data(), | 79 | memory_manager.ReadBlock(dma_get, command_headers.data(), |
| 80 | command_list_header.size * sizeof(u32)); | 80 | command_list_header.size * sizeof(u32)); |
| 81 | } else { | 81 | } else { |
| 82 | gpu.MemoryManager().ReadBlockUnsafe(dma_get, command_headers.data(), | 82 | memory_manager.ReadBlockUnsafe(dma_get, command_headers.data(), |
| 83 | command_list_header.size * sizeof(u32)); | 83 | command_list_header.size * sizeof(u32)); |
| 84 | } | 84 | } |
| 85 | } | 85 | } |
| 86 | for (std::size_t index = 0; index < command_headers.size();) { | 86 | for (std::size_t index = 0; index < command_headers.size();) { |
| @@ -154,7 +154,7 @@ void DmaPusher::SetState(const CommandHeader& command_header) { | |||
| 154 | 154 | ||
| 155 | void DmaPusher::CallMethod(u32 argument) const { | 155 | void DmaPusher::CallMethod(u32 argument) const { |
| 156 | if (dma_state.method < non_puller_methods) { | 156 | if (dma_state.method < non_puller_methods) { |
| 157 | gpu.CallMethod(GPU::MethodCall{ | 157 | puller.CallPullerMethod(Engines::Puller::MethodCall{ |
| 158 | dma_state.method, | 158 | dma_state.method, |
| 159 | argument, | 159 | argument, |
| 160 | dma_state.subchannel, | 160 | dma_state.subchannel, |
| @@ -168,12 +168,16 @@ void DmaPusher::CallMethod(u32 argument) const { | |||
| 168 | 168 | ||
| 169 | void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const { | 169 | void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const { |
| 170 | if (dma_state.method < non_puller_methods) { | 170 | if (dma_state.method < non_puller_methods) { |
| 171 | gpu.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods, | 171 | puller.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods, |
| 172 | dma_state.method_count); | 172 | dma_state.method_count); |
| 173 | } else { | 173 | } else { |
| 174 | subchannels[dma_state.subchannel]->CallMultiMethod(dma_state.method, base_start, | 174 | subchannels[dma_state.subchannel]->CallMultiMethod(dma_state.method, base_start, |
| 175 | num_methods, dma_state.method_count); | 175 | num_methods, dma_state.method_count); |
| 176 | } | 176 | } |
| 177 | } | 177 | } |
| 178 | 178 | ||
| 179 | void DmaPusher::BindRasterizer(VideoCore::RasterizerInterface* rasterizer) { | ||
| 180 | puller.BindRasterizer(rasterizer); | ||
| 181 | } | ||
| 182 | |||
| 179 | } // namespace Tegra | 183 | } // namespace Tegra |