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| author | 2023-08-27 02:58:00 +0200 | |
|---|---|---|
| committer | 2023-08-27 04:26:22 +0200 | |
| commit | 115792158d3ac4ca746d1775f2381e8f8dd18582 (patch) | |
| tree | fec8995dd2a887068625e9d1278d0562bee6a8cb /src/video_core/dma_pusher.cpp | |
| parent | Shader Recompiler: Auto stub special registers and dump pipelines on exception. (diff) | |
| download | yuzu-115792158d3ac4ca746d1775f2381e8f8dd18582.tar.gz yuzu-115792158d3ac4ca746d1775f2381e8f8dd18582.tar.xz yuzu-115792158d3ac4ca746d1775f2381e8f8dd18582.zip | |
VideoCore: Implement DispatchIndirect
Diffstat (limited to 'src/video_core/dma_pusher.cpp')
| -rw-r--r-- | src/video_core/dma_pusher.cpp | 28 |
1 files changed, 22 insertions, 6 deletions
diff --git a/src/video_core/dma_pusher.cpp b/src/video_core/dma_pusher.cpp index ab28951b6..58ce0d8c2 100644 --- a/src/video_core/dma_pusher.cpp +++ b/src/video_core/dma_pusher.cpp | |||
| @@ -14,6 +14,7 @@ | |||
| 14 | namespace Tegra { | 14 | namespace Tegra { |
| 15 | 15 | ||
| 16 | constexpr u32 MacroRegistersStart = 0xE00; | 16 | constexpr u32 MacroRegistersStart = 0xE00; |
| 17 | constexpr u32 ComputeInline = 0x6D; | ||
| 17 | 18 | ||
| 18 | DmaPusher::DmaPusher(Core::System& system_, GPU& gpu_, MemoryManager& memory_manager_, | 19 | DmaPusher::DmaPusher(Core::System& system_, GPU& gpu_, MemoryManager& memory_manager_, |
| 19 | Control::ChannelState& channel_state_) | 20 | Control::ChannelState& channel_state_) |
| @@ -83,20 +84,35 @@ bool DmaPusher::Step() { | |||
| 83 | dma_state.dma_get, command_list_header.size * sizeof(u32)); | 84 | dma_state.dma_get, command_list_header.size * sizeof(u32)); |
| 84 | } | 85 | } |
| 85 | } | 86 | } |
| 86 | if (Settings::IsGPULevelHigh() && dma_state.method < MacroRegistersStart) { | 87 | const auto safe_process = [&] { |
| 87 | Core::Memory::GpuGuestMemory<Tegra::CommandHeader, | 88 | Core::Memory::GpuGuestMemory<Tegra::CommandHeader, |
| 88 | Core::Memory::GuestMemoryFlags::SafeRead> | 89 | Core::Memory::GuestMemoryFlags::SafeRead> |
| 89 | headers(memory_manager, dma_state.dma_get, command_list_header.size, | 90 | headers(memory_manager, dma_state.dma_get, command_list_header.size, |
| 90 | &command_headers); | 91 | &command_headers); |
| 91 | ProcessCommands(headers); | 92 | ProcessCommands(headers); |
| 93 | }; | ||
| 94 | const auto unsafe_process = [&] { | ||
| 95 | Core::Memory::GpuGuestMemory<Tegra::CommandHeader, | ||
| 96 | Core::Memory::GuestMemoryFlags::UnsafeRead> | ||
| 97 | headers(memory_manager, dma_state.dma_get, command_list_header.size, | ||
| 98 | &command_headers); | ||
| 99 | ProcessCommands(headers); | ||
| 100 | }; | ||
| 101 | if (Settings::IsGPULevelHigh()) { | ||
| 102 | if (dma_state.method >= MacroRegistersStart) { | ||
| 103 | unsafe_process(); | ||
| 104 | return true; | ||
| 105 | } | ||
| 106 | if (subchannel_type[dma_state.subchannel] == Engines::EngineTypes::KeplerCompute && | ||
| 107 | dma_state.method == ComputeInline) { | ||
| 108 | unsafe_process(); | ||
| 109 | return true; | ||
| 110 | } | ||
| 111 | safe_process(); | ||
| 92 | return true; | 112 | return true; |
| 93 | } | 113 | } |
| 94 | Core::Memory::GpuGuestMemory<Tegra::CommandHeader, | 114 | unsafe_process(); |
| 95 | Core::Memory::GuestMemoryFlags::UnsafeRead> | ||
| 96 | headers(memory_manager, dma_state.dma_get, command_list_header.size, &command_headers); | ||
| 97 | ProcessCommands(headers); | ||
| 98 | } | 115 | } |
| 99 | |||
| 100 | return true; | 116 | return true; |
| 101 | } | 117 | } |
| 102 | 118 | ||