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| author | 2020-12-04 14:39:12 -0500 | |
|---|---|---|
| committer | 2020-12-04 16:19:09 -0500 | |
| commit | 677a8b208d47d0d2397197ce74c7039a8ea79d20 (patch) | |
| tree | 51f6cc58b69b42c7af300c6c56abd0af37e0c748 /src/video_core/cdma_pusher.h | |
| parent | Merge pull request #5064 from lioncash/node-shadow (diff) | |
| download | yuzu-677a8b208d47d0d2397197ce74c7039a8ea79d20.tar.gz yuzu-677a8b208d47d0d2397197ce74c7039a8ea79d20.tar.xz yuzu-677a8b208d47d0d2397197ce74c7039a8ea79d20.zip | |
video_core: Resolve more variable shadowing scenarios
Resolves variable shadowing scenarios up to the end of the OpenGL code
to make it nicer to review. The rest will be resolved in a following
commit.
Diffstat (limited to 'src/video_core/cdma_pusher.h')
| -rw-r--r-- | src/video_core/cdma_pusher.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/video_core/cdma_pusher.h b/src/video_core/cdma_pusher.h index 982f309c5..0db1cd646 100644 --- a/src/video_core/cdma_pusher.h +++ b/src/video_core/cdma_pusher.h | |||
| @@ -68,8 +68,8 @@ struct ChCommand { | |||
| 68 | std::vector<u32> arguments; | 68 | std::vector<u32> arguments; |
| 69 | }; | 69 | }; |
| 70 | 70 | ||
| 71 | using ChCommandHeaderList = std::vector<Tegra::ChCommandHeader>; | 71 | using ChCommandHeaderList = std::vector<ChCommandHeader>; |
| 72 | using ChCommandList = std::vector<Tegra::ChCommand>; | 72 | using ChCommandList = std::vector<ChCommand>; |
| 73 | 73 | ||
| 74 | struct ThiRegisters { | 74 | struct ThiRegisters { |
| 75 | u32_le increment_syncpt{}; | 75 | u32_le increment_syncpt{}; |
| @@ -96,7 +96,7 @@ enum class ThiMethod : u32 { | |||
| 96 | 96 | ||
| 97 | class CDmaPusher { | 97 | class CDmaPusher { |
| 98 | public: | 98 | public: |
| 99 | explicit CDmaPusher(GPU& gpu); | 99 | explicit CDmaPusher(GPU& gpu_); |
| 100 | ~CDmaPusher(); | 100 | ~CDmaPusher(); |
| 101 | 101 | ||
| 102 | /// Push NVDEC command buffer entries into queue | 102 | /// Push NVDEC command buffer entries into queue |
| @@ -109,17 +109,17 @@ public: | |||
| 109 | void Step(); | 109 | void Step(); |
| 110 | 110 | ||
| 111 | /// Invoke command class devices to execute the command based on the current state | 111 | /// Invoke command class devices to execute the command based on the current state |
| 112 | void ExecuteCommand(u32 offset, u32 data); | 112 | void ExecuteCommand(u32 state_offset, u32 data); |
| 113 | 113 | ||
| 114 | private: | 114 | private: |
| 115 | /// Write arguments value to the ThiRegisters member at the specified offset | 115 | /// Write arguments value to the ThiRegisters member at the specified offset |
| 116 | void ThiStateWrite(ThiRegisters& state, u32 offset, const std::vector<u32>& arguments); | 116 | void ThiStateWrite(ThiRegisters& state, u32 state_offset, const std::vector<u32>& arguments); |
| 117 | 117 | ||
| 118 | GPU& gpu; | 118 | GPU& gpu; |
| 119 | 119 | ||
| 120 | std::shared_ptr<Tegra::Nvdec> nvdec_processor; | 120 | std::shared_ptr<Nvdec> nvdec_processor; |
| 121 | std::unique_ptr<Tegra::Vic> vic_processor; | 121 | std::unique_ptr<Vic> vic_processor; |
| 122 | std::unique_ptr<Tegra::Host1x> host1x_processor; | 122 | std::unique_ptr<Host1x> host1x_processor; |
| 123 | std::unique_ptr<SyncptIncrManager> nvdec_sync; | 123 | std::unique_ptr<SyncptIncrManager> nvdec_sync; |
| 124 | std::unique_ptr<SyncptIncrManager> vic_sync; | 124 | std::unique_ptr<SyncptIncrManager> vic_sync; |
| 125 | ChClassId current_class{}; | 125 | ChClassId current_class{}; |