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| author | 2020-11-23 15:01:40 -0500 | |
|---|---|---|
| committer | 2021-02-13 13:07:53 -0500 | |
| commit | 77564f987cc52ea6d841e7d18ade2646783f3651 (patch) | |
| tree | 6c21f3c58453d3af5fba62b1fa59266d1149c180 /src/video_core/cdma_pusher.cpp | |
| parent | nvdec cleanup (diff) | |
| download | yuzu-77564f987cc52ea6d841e7d18ade2646783f3651.tar.gz yuzu-77564f987cc52ea6d841e7d18ade2646783f3651.tar.xz yuzu-77564f987cc52ea6d841e7d18ade2646783f3651.zip | |
streamline cdma_pusher/command_classes
Diffstat (limited to 'src/video_core/cdma_pusher.cpp')
| -rw-r--r-- | src/video_core/cdma_pusher.cpp | 51 |
1 files changed, 24 insertions, 27 deletions
diff --git a/src/video_core/cdma_pusher.cpp b/src/video_core/cdma_pusher.cpp index c725baa98..d80e74225 100644 --- a/src/video_core/cdma_pusher.cpp +++ b/src/video_core/cdma_pusher.cpp | |||
| @@ -38,45 +38,42 @@ CDmaPusher::CDmaPusher(GPU& gpu_) | |||
| 38 | CDmaPusher::~CDmaPusher() = default; | 38 | CDmaPusher::~CDmaPusher() = default; |
| 39 | 39 | ||
| 40 | void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) { | 40 | void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) { |
| 41 | std::vector<u32> values(entries.size()); | 41 | for (const auto& value : entries) { |
| 42 | std::memcpy(values.data(), entries.data(), entries.size() * sizeof(u32)); | ||
| 43 | |||
| 44 | for (const u32 value : values) { | ||
| 45 | if (mask != 0) { | 42 | if (mask != 0) { |
| 46 | const auto lbs = static_cast<u32>(std::countr_zero(mask)); | 43 | const auto lbs = static_cast<u32>(std::countr_zero(mask)); |
| 47 | mask &= ~(1U << lbs); | 44 | mask &= ~(1U << lbs); |
| 48 | ExecuteCommand(static_cast<u32>(offset + lbs), value); | 45 | ExecuteCommand(offset + lbs, value.raw); |
| 49 | continue; | 46 | continue; |
| 50 | } else if (count != 0) { | 47 | } else if (count != 0) { |
| 51 | --count; | 48 | --count; |
| 52 | ExecuteCommand(static_cast<u32>(offset), value); | 49 | ExecuteCommand(offset, value.raw); |
| 53 | if (incrementing) { | 50 | if (incrementing) { |
| 54 | ++offset; | 51 | ++offset; |
| 55 | } | 52 | } |
| 56 | continue; | 53 | continue; |
| 57 | } | 54 | } |
| 58 | const auto mode = static_cast<ChSubmissionMode>((value >> 28) & 0xf); | 55 | const auto mode = value.submission_mode.Value(); |
| 59 | switch (mode) { | 56 | switch (mode) { |
| 60 | case ChSubmissionMode::SetClass: { | 57 | case ChSubmissionMode::SetClass: { |
| 61 | mask = value & 0x3f; | 58 | mask = value.value & 0x3f; |
| 62 | offset = (value >> 16) & 0xfff; | 59 | offset = value.method_offset; |
| 63 | current_class = static_cast<ChClassId>((value >> 6) & 0x3ff); | 60 | current_class = static_cast<ChClassId>((value.value >> 6) & 0x3ff); |
| 64 | break; | 61 | break; |
| 65 | } | 62 | } |
| 66 | case ChSubmissionMode::Incrementing: | 63 | case ChSubmissionMode::Incrementing: |
| 67 | case ChSubmissionMode::NonIncrementing: | 64 | case ChSubmissionMode::NonIncrementing: |
| 68 | count = value & 0xffff; | 65 | count = value.value; |
| 69 | offset = (value >> 16) & 0xfff; | 66 | offset = value.method_offset; |
| 70 | incrementing = mode == ChSubmissionMode::Incrementing; | 67 | incrementing = mode == ChSubmissionMode::Incrementing; |
| 71 | break; | 68 | break; |
| 72 | case ChSubmissionMode::Mask: | 69 | case ChSubmissionMode::Mask: |
| 73 | mask = value & 0xffff; | 70 | mask = value.value; |
| 74 | offset = (value >> 16) & 0xfff; | 71 | offset = value.method_offset; |
| 75 | break; | 72 | break; |
| 76 | case ChSubmissionMode::Immediate: { | 73 | case ChSubmissionMode::Immediate: { |
| 77 | const u32 data = value & 0xfff; | 74 | const u32 data = value.value & 0xfff; |
| 78 | offset = (value >> 16) & 0xfff; | 75 | offset = value.method_offset; |
| 79 | ExecuteCommand(static_cast<u32>(offset), data); | 76 | ExecuteCommand(offset, data); |
| 80 | break; | 77 | break; |
| 81 | } | 78 | } |
| 82 | default: | 79 | default: |
| @@ -89,8 +86,8 @@ void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) { | |||
| 89 | void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | 86 | void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { |
| 90 | switch (current_class) { | 87 | switch (current_class) { |
| 91 | case ChClassId::NvDec: | 88 | case ChClassId::NvDec: |
| 92 | ThiStateWrite(nvdec_thi_state, state_offset, {data}); | 89 | ThiStateWrite(nvdec_thi_state, offset, data); |
| 93 | switch (static_cast<ThiMethod>(state_offset)) { | 90 | switch (static_cast<ThiMethod>(offset)) { |
| 94 | case ThiMethod::IncSyncpt: { | 91 | case ThiMethod::IncSyncpt: { |
| 95 | LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method"); | 92 | LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method"); |
| 96 | const auto syncpoint_id = static_cast<u32>(data & 0xFF); | 93 | const auto syncpoint_id = static_cast<u32>(data & 0xFF); |
| @@ -106,8 +103,8 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 106 | case ThiMethod::SetMethod1: | 103 | case ThiMethod::SetMethod1: |
| 107 | LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}", | 104 | LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}", |
| 108 | static_cast<u32>(nvdec_thi_state.method_0)); | 105 | static_cast<u32>(nvdec_thi_state.method_0)); |
| 109 | nvdec_processor->ProcessMethod(static_cast<Nvdec::Method>(nvdec_thi_state.method_0), | 106 | nvdec_processor->ProcessMethod( |
| 110 | {data}); | 107 | static_cast<Tegra::Nvdec::Method>(nvdec_thi_state.method_0), data); |
| 111 | break; | 108 | break; |
| 112 | default: | 109 | default: |
| 113 | break; | 110 | break; |
| @@ -131,7 +128,8 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 131 | case ThiMethod::SetMethod1: | 128 | case ThiMethod::SetMethod1: |
| 132 | LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})", | 129 | LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})", |
| 133 | static_cast<u32>(vic_thi_state.method_0), data); | 130 | static_cast<u32>(vic_thi_state.method_0), data); |
| 134 | vic_processor->ProcessMethod(static_cast<Vic::Method>(vic_thi_state.method_0), {data}); | 131 | vic_processor->ProcessMethod(static_cast<Tegra::Vic::Method>(vic_thi_state.method_0), |
| 132 | data); | ||
| 135 | break; | 133 | break; |
| 136 | default: | 134 | default: |
| 137 | break; | 135 | break; |
| @@ -140,7 +138,7 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 140 | case ChClassId::Host1x: | 138 | case ChClassId::Host1x: |
| 141 | // This device is mainly for syncpoint synchronization | 139 | // This device is mainly for syncpoint synchronization |
| 142 | LOG_DEBUG(Service_NVDRV, "Host1X Class Method"); | 140 | LOG_DEBUG(Service_NVDRV, "Host1X Class Method"); |
| 143 | host1x_processor->ProcessMethod(static_cast<Host1x::Method>(state_offset), {data}); | 141 | host1x_processor->ProcessMethod(static_cast<Tegra::Host1x::Method>(offset), data); |
| 144 | break; | 142 | break; |
| 145 | default: | 143 | default: |
| 146 | UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class)); | 144 | UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class)); |
| @@ -148,10 +146,9 @@ void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) { | |||
| 148 | } | 146 | } |
| 149 | } | 147 | } |
| 150 | 148 | ||
| 151 | void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 state_offset, | 149 | void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 offset, u32 argument) { |
| 152 | const std::vector<u32>& arguments) { | 150 | u8* const state_offset = reinterpret_cast<u8*>(&state) + sizeof(u32) * offset; |
| 153 | u8* const state_offset_ptr = reinterpret_cast<u8*>(&state) + sizeof(u32) * state_offset; | 151 | std::memcpy(state_offset, &argument, sizeof(u32)); |
| 154 | std::memcpy(state_offset_ptr, arguments.data(), sizeof(u32) * arguments.size()); | ||
| 155 | } | 152 | } |
| 156 | 153 | ||
| 157 | } // namespace Tegra | 154 | } // namespace Tegra |