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| author | 2022-10-09 07:04:03 +0200 | |
|---|---|---|
| committer | 2022-10-09 07:04:03 +0200 | |
| commit | 55e6d0dae003378ca8ed9a10b6fbb8626a1fd25f (patch) | |
| tree | f05d721b40595c3caa9543af50015041a66c2bdf /src/video_core/buffer_cache | |
| parent | Merge pull request #9033 from liamwhite/stub-fsp (diff) | |
| parent | Update 3D regs (diff) | |
| download | yuzu-55e6d0dae003378ca8ed9a10b6fbb8626a1fd25f.tar.gz yuzu-55e6d0dae003378ca8ed9a10b6fbb8626a1fd25f.tar.xz yuzu-55e6d0dae003378ca8ed9a10b6fbb8626a1fd25f.zip | |
Merge pull request #8766 from Kelebek1/regs
[video_core] Update 3D registers
Diffstat (limited to 'src/video_core/buffer_cache')
| -rw-r--r-- | src/video_core/buffer_cache/buffer_cache.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/video_core/buffer_cache/buffer_cache.h b/src/video_core/buffer_cache/buffer_cache.h index 8e26b3f95..2ba33543c 100644 --- a/src/video_core/buffer_cache/buffer_cache.h +++ b/src/video_core/buffer_cache/buffer_cache.h | |||
| @@ -994,13 +994,13 @@ void BufferCache<P>::BindHostIndexBuffer() { | |||
| 994 | const u32 size = index_buffer.size; | 994 | const u32 size = index_buffer.size; |
| 995 | SynchronizeBuffer(buffer, index_buffer.cpu_addr, size); | 995 | SynchronizeBuffer(buffer, index_buffer.cpu_addr, size); |
| 996 | if constexpr (HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT) { | 996 | if constexpr (HAS_FULL_INDEX_AND_PRIMITIVE_SUPPORT) { |
| 997 | const u32 new_offset = offset + maxwell3d->regs.index_array.first * | 997 | const u32 new_offset = offset + maxwell3d->regs.index_buffer.first * |
| 998 | maxwell3d->regs.index_array.FormatSizeInBytes(); | 998 | maxwell3d->regs.index_buffer.FormatSizeInBytes(); |
| 999 | runtime.BindIndexBuffer(buffer, new_offset, size); | 999 | runtime.BindIndexBuffer(buffer, new_offset, size); |
| 1000 | } else { | 1000 | } else { |
| 1001 | runtime.BindIndexBuffer(maxwell3d->regs.draw.topology, maxwell3d->regs.index_array.format, | 1001 | runtime.BindIndexBuffer(maxwell3d->regs.draw.topology, maxwell3d->regs.index_buffer.format, |
| 1002 | maxwell3d->regs.index_array.first, | 1002 | maxwell3d->regs.index_buffer.first, |
| 1003 | maxwell3d->regs.index_array.count, buffer, offset, size); | 1003 | maxwell3d->regs.index_buffer.count, buffer, offset, size); |
| 1004 | } | 1004 | } |
| 1005 | } | 1005 | } |
| 1006 | 1006 | ||
| @@ -1017,7 +1017,7 @@ void BufferCache<P>::BindHostVertexBuffers() { | |||
| 1017 | } | 1017 | } |
| 1018 | flags[Dirty::VertexBuffer0 + index] = false; | 1018 | flags[Dirty::VertexBuffer0 + index] = false; |
| 1019 | 1019 | ||
| 1020 | const u32 stride = maxwell3d->regs.vertex_array[index].stride; | 1020 | const u32 stride = maxwell3d->regs.vertex_streams[index].stride; |
| 1021 | const u32 offset = buffer.Offset(binding.cpu_addr); | 1021 | const u32 offset = buffer.Offset(binding.cpu_addr); |
| 1022 | runtime.BindVertexBuffer(index, buffer, offset, binding.size, stride); | 1022 | runtime.BindVertexBuffer(index, buffer, offset, binding.size, stride); |
| 1023 | } | 1023 | } |
| @@ -1157,7 +1157,7 @@ void BufferCache<P>::BindHostGraphicsTextureBuffers(size_t stage) { | |||
| 1157 | 1157 | ||
| 1158 | template <class P> | 1158 | template <class P> |
| 1159 | void BufferCache<P>::BindHostTransformFeedbackBuffers() { | 1159 | void BufferCache<P>::BindHostTransformFeedbackBuffers() { |
| 1160 | if (maxwell3d->regs.tfb_enabled == 0) { | 1160 | if (maxwell3d->regs.transform_feedback_enabled == 0) { |
| 1161 | return; | 1161 | return; |
| 1162 | } | 1162 | } |
| 1163 | for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) { | 1163 | for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) { |
| @@ -1268,7 +1268,7 @@ template <class P> | |||
| 1268 | void BufferCache<P>::UpdateIndexBuffer() { | 1268 | void BufferCache<P>::UpdateIndexBuffer() { |
| 1269 | // We have to check for the dirty flags and index count | 1269 | // We have to check for the dirty flags and index count |
| 1270 | // The index count is currently changed without updating the dirty flags | 1270 | // The index count is currently changed without updating the dirty flags |
| 1271 | const auto& index_array = maxwell3d->regs.index_array; | 1271 | const auto& index_array = maxwell3d->regs.index_buffer; |
| 1272 | auto& flags = maxwell3d->dirty.flags; | 1272 | auto& flags = maxwell3d->dirty.flags; |
| 1273 | if (!flags[Dirty::IndexBuffer] && last_index_count == index_array.count) { | 1273 | if (!flags[Dirty::IndexBuffer] && last_index_count == index_array.count) { |
| 1274 | return; | 1274 | return; |
| @@ -1311,10 +1311,10 @@ void BufferCache<P>::UpdateVertexBuffer(u32 index) { | |||
| 1311 | if (!maxwell3d->dirty.flags[Dirty::VertexBuffer0 + index]) { | 1311 | if (!maxwell3d->dirty.flags[Dirty::VertexBuffer0 + index]) { |
| 1312 | return; | 1312 | return; |
| 1313 | } | 1313 | } |
| 1314 | const auto& array = maxwell3d->regs.vertex_array[index]; | 1314 | const auto& array = maxwell3d->regs.vertex_streams[index]; |
| 1315 | const auto& limit = maxwell3d->regs.vertex_array_limit[index]; | 1315 | const auto& limit = maxwell3d->regs.vertex_stream_limits[index]; |
| 1316 | const GPUVAddr gpu_addr_begin = array.StartAddress(); | 1316 | const GPUVAddr gpu_addr_begin = array.Address(); |
| 1317 | const GPUVAddr gpu_addr_end = limit.LimitAddress() + 1; | 1317 | const GPUVAddr gpu_addr_end = limit.Address() + 1; |
| 1318 | const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr_begin); | 1318 | const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr_begin); |
| 1319 | u32 address_size = static_cast<u32>( | 1319 | u32 address_size = static_cast<u32>( |
| 1320 | std::min(gpu_addr_end - gpu_addr_begin, static_cast<u64>(std::numeric_limits<u32>::max()))); | 1320 | std::min(gpu_addr_end - gpu_addr_begin, static_cast<u64>(std::numeric_limits<u32>::max()))); |
| @@ -1380,7 +1380,7 @@ void BufferCache<P>::UpdateTextureBuffers(size_t stage) { | |||
| 1380 | 1380 | ||
| 1381 | template <class P> | 1381 | template <class P> |
| 1382 | void BufferCache<P>::UpdateTransformFeedbackBuffers() { | 1382 | void BufferCache<P>::UpdateTransformFeedbackBuffers() { |
| 1383 | if (maxwell3d->regs.tfb_enabled == 0) { | 1383 | if (maxwell3d->regs.transform_feedback_enabled == 0) { |
| 1384 | return; | 1384 | return; |
| 1385 | } | 1385 | } |
| 1386 | for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) { | 1386 | for (u32 index = 0; index < NUM_TRANSFORM_FEEDBACK_BUFFERS; ++index) { |
| @@ -1390,11 +1390,11 @@ void BufferCache<P>::UpdateTransformFeedbackBuffers() { | |||
| 1390 | 1390 | ||
| 1391 | template <class P> | 1391 | template <class P> |
| 1392 | void BufferCache<P>::UpdateTransformFeedbackBuffer(u32 index) { | 1392 | void BufferCache<P>::UpdateTransformFeedbackBuffer(u32 index) { |
| 1393 | const auto& binding = maxwell3d->regs.tfb_bindings[index]; | 1393 | const auto& binding = maxwell3d->regs.transform_feedback.buffers[index]; |
| 1394 | const GPUVAddr gpu_addr = binding.Address() + binding.buffer_offset; | 1394 | const GPUVAddr gpu_addr = binding.Address() + binding.start_offset; |
| 1395 | const u32 size = binding.buffer_size; | 1395 | const u32 size = binding.size; |
| 1396 | const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr); | 1396 | const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr); |
| 1397 | if (binding.buffer_enable == 0 || size == 0 || !cpu_addr) { | 1397 | if (binding.enable == 0 || size == 0 || !cpu_addr) { |
| 1398 | transform_feedback_buffers[index] = NULL_BINDING; | 1398 | transform_feedback_buffers[index] = NULL_BINDING; |
| 1399 | return; | 1399 | return; |
| 1400 | } | 1400 | } |